Circuit Diagram

ELECTRIC_TUNING_FOR_F_M_OSCILLATOR

Published:2009/7/14 23:23:00 Author:Jessie

Voltage-tunable ferroelectric capacitors are used for tuning as well as for modulating.-T. W. Butler, Jr., Ferroelectrics Tune Electronic Circuits, Electronics, 32;3, p 52-55.   (View)

View full Circuit Diagram | Comments | Reading(601)

SIMPLE_SIGNAL_GENERATOR

Published:2009/7/14 23:19:00 Author:Jessie

The use of an NE555 allows generation of signals from 1 Hz to higher than 10 kHz. The output is a square wave.   (View)

View full Circuit Diagram | Comments | Reading(1463)

555_RAMP_GENERATOR

Published:2009/7/14 23:17:00 Author:Jessie

When the timing capacitor of an ordinary 555 circuit charges, an exponential curve across the capacitor results. Obviously, a fast-rising square wave is seen at the output. An accurate ramp voltage can be generated by the 555, though, by ignoring the square-wave output and sneakily using a constant-current source instead of the resistor charging network. The figure shows how a simple J505 constant-current diode can be used to create a reasonable ramp, which will be observed across the capacitor C1. D1 is specified at 1 mA nominal. Assuming that C1 is discharged initially, after power-up the 555 triggers (Vtring, <1/3 Vcc), and C1 starts to charge at a fixed rate through the constant-current source D1 until the threshold voltage of 2/3 Vcc is reached. Then the 555 (IC1) will rapidly discharge the capacitor into pin 7 down to1/3Vcc, when the chip will trigger again. With a 12-V rail, the result is a sawtooth waveform of 4 V p-p. A fast series of spikes is seen at pin 3.   (View)

View full Circuit Diagram | Comments | Reading(2198)

BASIC_FET_FLIP_FLOP

Published:2009/7/14 20:47:00 Author:May

Connected as scale-of-two binary frequency divider, complete with steering diodes, speedup capacitors, and coupling capacitors. Used where speed is not primary consideration.-L. J. Sevin , Jr., Field-Effect Transistors, McGraw-Hill, N.Y., 1965, p 89.   (View)

View full Circuit Diagram | Comments | Reading(1326)

LOW_POWER_PLL_STABILIZED_FM_STEREO_TRANSMITTER

Published:2009/7/14 20:47:00 Author:May

The schematic shows a high-performance FM stereo transmitter, consisting of a stereo generator IC1 (audio matrixing), a balanced modulator IC2, a pilot and subcarrier generator IC3 and IC4, and a PLL synthesizer IC6, IC7, and IC8. Frequencies from 76 to 108 MHz are supported, with 100-kHz resolution. All oscillators are crystal-controlled for stability. The output is 0.5 to 0.7 V into 50 Ω.In the United States, in order to comply with FCC regulations, the transmitter is terminated in a 56Ω resistor, which is nonradiating , and a small whip antenna (up to 12 inches long) is used as a radiating probe. The radiated field must be kept to 250 μV/m at 3 m from the antenna. In open locations, a 4-inch whip should give sufficient range (100 feet typical); for use inside buildings, where some losses are encountered, a 12-inch antenna might be needed. Do not use more than a 12-inch whip. In other nations, where regulations allow, a matched antenna can be used and the output amplifier can be run at 15 V or more, with over 200 mW output possible. Up to 24 V can be used if higher-voltage bypass capacitors are used on the supply line and R27 is changed to 680Ω. IC5 might need heatsinking in this case. A complete kit of parts, including PC board, is available from North Country Radio, P.O. Box 53, Wykagyl Station, New Rochelle, NY 10804-0053A.   (View)

View full Circuit Diagram | Comments | Reading(5555)

BANDPASS_FOR_170_Hz_RIIY_SHlFI

Published:2009/7/14 23:17:00 Author:Jessie

Three-stage active Butterworth bandpass input filter is used in radioteletype demodulator to separate RTTY tones from each other and from noise. Filter is centered on 2200 Hz, and has bandpass of about 260 Hz to allow reception of some of audio sidebands produced by keying and allow for small drift. Five pots serve for trimming center frequency of each stage andQ of end stages. Article gives step-by-step design and alignment procedures. Use two 10K resistors between V and ground to get V/2 for bias when operating from single supply.-P. A. Stark, Design an Active RTTY Filter, 73 Magazine, Sept. 1977, p 38-43.   (View)

View full Circuit Diagram | Comments | Reading(1102)

LOW_COST_LINE_OPERATED_PHONO

Published:2009/7/14 23:16:00 Author:Jessie

Provides 1 w output with only two transistors. Highinput impedance (above 10,000 meg) of fet permits direct drive by high-outputcartridge, while MJ2252 npn silkon transistor operotes directly from 120 v d-c output of simple power supply using Motorokt 1N4004 sur melic silicon rectiner.Volues are:C1-100 mfd; C2-0.1 mfd; C3-100 mfd, 3v; R1-330; R2-10K; R3-3K; R4-1 meg;R5-5K; R6-l00K; R7-33.-D. L. Wollesen, A Line Operctted Solid State PhonogmphAmplifier, Motorokt Applkation Note AN-183, Feb. 1966.   (View)

View full Circuit Diagram | Comments | Reading(953)

BINARY_FLIP_FLOP_IURNS_ON

Published:2009/7/14 20:47:00 Author:May

Triggering is accomplished by turning transistors on, whereas in most similar circuits the transistors are turned off. Trigger pulse merely has to lower point o below ground for fraction of microsecond. Almost any diode and transistor can be used. Speed can be up to 10 Mc with high-speed transistors. Output fall time is fast.-Binary Flip-Flop Tums On, Electronic Circuit Design Handbook, Mactier Pub. Corp., N.Y., 1965, p 214.   (View)

View full Circuit Diagram | Comments | Reading(614)

FSK_DECODER

Published:2009/7/14 23:11:00 Author:Jessie

Simple circuit for Signetics NE565 PLL locks to input frequency and tracks it between two values used, to produce corresponding DC shift at output. Values shown are for 1070-Hz and 1270-Hz FSK signals. Three-stage RC ladder filter removes sum frequency component. Band edge of filter is chosen to be about halfway between maximum keying rate (150 Hz) and twice input frequency (about 2200 Hz). Output is made logic-compatible by connecting voltage comparator to pin 6.- Signetics Analog Data Manual, Signetics, Sunnyvale, CA, 1977, p 845.   (View)

View full Circuit Diagram | Comments | Reading(1822)

PAIRED_INVERTERS

Published:2009/7/14 20:46:00 Author:May

Cross-coupling of two basic inverters gives low-cost lip-lop using 2N711 germanium pnp mesa switching transistors. Flip-flop can be set and then reset, or run as Gaunter using combined input. Close regulation is required for -4 v supply.-P. A. Mclnnis, Low-Cost Computer Circuits, Motorola Application Note AN-130, Nov. 1965.   (View)

View full Circuit Diagram | Comments | Reading(576)

AC_OVERVOLTAGE

Published:2009/7/14 23:09:00 Author:Jessie

Used to protect delicate equipment from sustained high AC line voltage, by disconnecting supply when it exceeds preset level selected by R16. When base-emitter voltage of Tr2 exceeds 7.5 V, optocoupler switches Tr1 on to provide fast switching action. Output pulse is shaped by IC3 for use in triggering mono IC2. When line falls below preset level, mono reverts to stable state and switches on AC supply again.-F. E. George, A.C. Line Sensor, Wireless World, March 1977, p 42.   (View)

View full Circuit Diagram | Comments | Reading(775)

PLL_TOUCH_TONE_DECODER

Published:2009/7/14 20:45:00 Author:May

Seven 567 PLLs sense presence of selected tones from common 100-200 VBMS input line, while 8885 NOR gates perform necessary decoding logic to generate decimal outputs. Circuit takes advantage of good frequency selectivity provided by lock-and-capture ranges of PLLs, as required for discriminating against many tones.-E. Murthi, Monolithic Phase-Locked Loops-Analogs Do All the Work of Digitals, and Much More, EDN Magazine, Sept. 5, 1977, p 59-64.   (View)

View full Circuit Diagram | Comments | Reading(646)

2_WATT_POWER_AMPLIFIER_AT_160_MC

Published:2009/7/14 23:08:00 Author:Jessie

Uses 2N2950 npn silicon planar epitaxial transistor designed for medium-power high-frequency applications. Overall gain is 23 db. Intended for f-m or c-w applications only. For a-m, supply voltage on final stage must be reduced lo 12 v lo remain within voltage rating, and driver should also be 2N2950.-D. L. Adley, Designing 160 Mc FM or CR Circuitry Using a Silicon High Frequency Transistor, Motorola Application Note AN-168, Aug. 1965.   (View)

View full Circuit Diagram | Comments | Reading(875)

DOUBLING_CONTROL_RANGE

Published:2009/7/14 20:45:00 Author:May

Circuit doubles frequency-deviation ratio of given VCO. Control voltage of MC1658 VCO, with range of 0 to -2 V, is attenuated and then applied to AM685 opamp comparator. When control voltage reaches an extreme and crosses over amplifier's reference voltage, detector switches to opposite state. Circuit output is thus either that of VCO or VCO divided by 2. Article describes op-eration in detaiL-E. Kane, Expander Doubles VCO Frequency Deviation, EDN Magazine, Jan. 20, 1977, p 94.   (View)

View full Circuit Diagram | Comments | Reading(666)

25_W_TRANSFORMERLESS_AMPLIFIER

Published:2009/7/14 23:08:00 Author:Jessie

Uses economical transistors and diodes. Requires 330 mv input for full output. Total harmonic distortion at 1 kc is less than 1% at fulloutput.- Transistor Manual, Seventh Edition, General Electric Co., 1964, p 266.   (View)

View full Circuit Diagram | Comments | Reading(782)

ZERO_CROSSING_DETECTOR

Published:2009/7/14 23:07:00 Author:Jessie

Output 1 of 322 comparator A1 is high when input signal is above zero and low when input is below zero. Output of comparator A1 is thus square wave in phase with zero crossings of input. When R1, is 22K, input can be up to ±10 V amplitude. A2 is mono MVBR connected to fire when output 1 of A1 goes high (at zero crossings). Resulting negative-going narrow pulses at output 2 are useful for time marks.-W. G. Jung, IC Timer Cook-book, Howard W. Sams, Indianapolis, IN, 1977, p 152.   (View)

View full Circuit Diagram | Comments | Reading(2869)

HIGH_INPUT_Z_UNITY_GAIN

Published:2009/7/14 20:45:00 Author:May

Source-output connection provides feedback. Cascade input stage has high gain, as required for good amplifier gain accuracy. Upper cutoff is 5,000kc for 10,000-ohm generator resistance.-Texas Instruments Inc., Solid-State Communications, McGraw-Hill, N.Y.1966, p141.   (View)

View full Circuit Diagram | Comments | Reading(828)

VOLTAGE_CONTROLLED_100_MC_OSCILLATOR

Published:2009/7/14 23:06:00 Author:Jessie

Video voltage of wide-band f-m receiver is applied to base of silicon tetrode to give voltage-sensitive 100-Mc f-m oscillator in which deviations can be up to 1 Mc without excessive distortion.-S. Kallus, B. Robinovici, and A. Newton, Fitting a Wide.Band Signal Into a Narrow-Band Receiver, Electronics, 36;10, p 47-49.   (View)

View full Circuit Diagram | Comments | Reading(725)

NONSTALLING_FLIP_FLOP_FOR_CAPACITIVE_LOAD

Published:2009/7/14 20:44:00 Author:May

Used for transferring data into storage having heavy capacitive load, such as long connecting wires. Complementary con figuration, with load in emitter circuit of one transistor, makes stage trigger reliably in fraction of microsecond.-Non-Stalling Flip-Flop for Capacitive Load, Electronic Circuit Design Handbook, Mactier Pub. Corp., N.Y., 1965, p 213.   (View)

View full Circuit Diagram | Comments | Reading(664)

THREE_STAGE_CASCADED_COMMON_EMITTER

Published:2009/7/14 23:06:00 Author:Jessie

Gives current gain of 90 db at 1 kc,outputvoltage swing is 2 v peak-to-peak. All transistors are 2N1565. Values of C1 and C2depend upon frequency response desired; typical values are to and 100 mfd respectively.-Texas Instruments Inc., Transistor Circuit Design, McGraw-Hill,N.Y.,1963, p 205.   (View)

View full Circuit Diagram | Comments | Reading(980)

Pages:605/2234 At 20601602603604605606607608609610611612613614615616617618619620Under 20