FSK_DECODER

Published:2009/7/14 23:11:00 Author:Jessie | From:SeekIC

Simple circuit for Signetics NE565 PLL locks to input frequency and tracks it between two values used, to produce corresponding DC shift at output. Values shown are for 1070-Hz and 1270-Hz FSK signals. Three-stage RC ladder filter removes sum frequency component. Band edge of filter is chosen to be about halfway between maximum keying rate (150 Hz) and twice input frequency (about 2200 Hz). Output is made logic-compatible by connecting voltage comparator to pin 6.- Signetics Analog Data Manual, Signetics, Sunnyvale, CA, 1977, p 845.



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