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PCK2008A, PCK2010, PCK2010PDL

Table of contents:
Info of PCK2008A
Info of PCK2010
Info of PCK2010PDL

PCK2008A, PCK2010, PCK2010PDL Selling Leads, Datasheet

MFG:PHI Package Cooled:3/SOT23 D/C:00+

PCK2008A, PCK2010, PCK2010PDL Datasheet download

Five Points

Part Number: PCK2008A

MFG: PHI

Package Cooled: 3/SOT23

D/C: 00+

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PCK2010 General Description

The PCK2010 is a clock synthesizer/driver chip for a PentiumII andother similar processors.

The PCK2010 has four CPU clock outputs at 2.5V, two CPUDIV2clock outputs running at CPU clock frequency (66MHz or 50MHzdepending on the state of SEL133/100) and four 3V66 clocksrunning at 66MHz. There are eight PCI clock outputs running at33MHz. One of the PCI clock outputs is free-running. Additionally,the part has three 2.5V IOAPIC clock outputs at 16.67MHz and two3.3V reference clock outputs at 14.318MHz. All clock outputs meetIntel's drive strength, rise/fall time, jitter, accuracy, and skewrequirements.

The part possesses dedicated power-down, CPUSTOP, andPCISTOP input pins for power management control. These inputsare synchronized on-chip and ensure glitch-free output transitions.When the CPUSTOP input is asserted, the CPU clock outputs and3V66 clock outputs are driven LOW. When the PCISTOP input isasserted, the PCI clock outputs are driven LOW.

Finally, when the PWRDWN input pin is asserted, the internalreference oscillator and PLLs are shut down, and all outputs aredriven LOW.

PCK2010 Maximum Ratings

SYMBOL	PARAMETER	CONDITION	LIMITS		UNIT
SYMBOL	PARAMETER	CONDITION	MIN	MAX	UNIT
VDD3	DC 3.3 V core supply voltage		0.5	+4.6	V
VDDQ3	DC 3.3 V I/O supply voltage		0.5	+4.6	V
VDDQ2	DC 2.5 V I/O supply voltage		0.5	+3.6	V
I_IK	DC input diode current	V_I< 0		-50	mA
V_I	DC input voltage	Note 2	0.5	+5.5	V
I_OK	DC output diode current	_VO > V_CC or V_O < 0		±50	mA
V_O	DC output voltage	Note 2	-0.5	V_CC+ 0.5	V
I_O	DC output source or sink current	V_O>= 0 to V_CC	-	±50	mA
T_STG	Storage temperature range		65	+150	°C
P_tot	Power dissipation per package plastic medium-shrink SO (SSOP)	For temperature range: 0 to +70°Cabove +55°C derate linearly with 11.3mW/K	-	850	mW

NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

PCK2010 Features

• Mixed 2.5V and 3.3V operation
• Four CPU clocks at 2.5V
• Eight PCI clocks at 3.3V, one free-running(synchronous with CPU clocks)
• Four 3.3V fixed clocks @ 66MHz
• Two 2.5V CPUDIV2 clocks @ CPU clock frequency
• Three 2.5V IOAPIC clocks @ 16.67 MHz
• One 3.3V 48MHz USB clock
• Two 3.3V reference clocks @ 14.318 MHz
• Reference 14.31818 MHz Xtal oscillator input
• 133 MHz or 100 MHz operation
• Power management control input pins
• LOW CPU clock jitter 3 250 ps cycle-cycle
• LOW skew outputs
• 0.0ns 1.5ns CPU - 3V66 delay
• 1.5ns 4.0ns 3V66 - PCI delay
• 1.5ns 4.0 ns CPU - IOAPIC delay
• Available in 56-pin SSOP package
• ±0.5% center spread spectrum capability via select pins; 0.5% own spread spectrum capability via select pins

PCK2010 Connection Diagram

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