Features: • 100 ps part-to-part skew typical• 35 ps output-to-output skew typical• Differential design• VBB output• Low voltage VCC range of +2.375 V to +3.8 V for PECL• 75 kW input pull-down resistors• ECL/PECL outputs• Form, fit, and function compa...
PCK111: Features: • 100 ps part-to-part skew typical• 35 ps output-to-output skew typical• Differential design• VBB output• Low voltage VCC range of +2.375 V to +3.8 V for PECL...
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SYMBOL |
PARAMETER |
LIMITS |
UNIT |
VCC |
Supply voltage |
0.5 to +4.6 |
V |
ESDHBM |
Electrostatic discharge (Human Body Model; 1.5 kW, 100 pF) |
>2 |
kV |
ESDMM |
Electrostatic discharge (Machine Model; 0 kW, 200 pF) |
>200 |
V |
The PCK111 is a low skew 1-to-10 differential driver, designed with lock distribution in mind. It accepts two clock sources into an input ultiplexer. The PECL input signals can be either differential or ingle-ended if the VBB output is used. The selected signal is fanned ut to 10 identical differential outputs.
The PCK111 is specifically designed, modeled and produced with ow skew as the key goal. Optimal design and layout serve to inimize gate-to-gate skew within a device, and empirical modeling s used to determine process control limits that ensure consistent PD distributions from lot to lot. The net result is a dependable, uaranteed low skew device.
To ensure that the tight skew specification is met, it is necessary that oth sides of the differential output are terminated into 50 W, even if nly one side is being used. In most applications, all ten differential airs of PCK111 will be used, and therefore terminated. In the case where fewer han ten pairs are used, it is necessary to terminate at least the utput pairs on the same package side as the pair(s) being used on hat side, in order to maintain minimum skew. Failure to do this will esult in small degradations of propagation delay (on the order of 020 ps) of the output(s) being used, which, while not being atastrophic to most designs, will mean a loss of skew margin.
The PCK111 can be used for high performance clock distribution in 3.3 V or +2.5 V systems. Designers can take advantage of the CK111's performance to distribute low skew clocks across the ackplane or the board. In a PECL environment, series or Thevenin ine terminations are typically used as they require no additional ower supplies.
The PCK111 may be driven single-endedly utilizing the VBB bias utput with the CLK0 input. If a single-ended signal is to be used, he VBB pin should be connected to the CLK0 input and bypassed to round via a 0.01 mF capacitor. The VBB output can only source/sink .2 mA, therefore, it should be used as a switching reference for the CK111 only. Part-to-part skew specifications are not guaranteed hen driving the PCK111 single-endedly.