Want to post a buying lead? If you are not a member yet, please select the specific/related part number first and then fill the quantity and your contact details in the "Request for Quotation Form" on the left, and then click "Send RFQ".Your buying lead can then be posted, and the reliable suppliers will quote via our online message system or other channels soon.
These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
NDB7050L Maximum Ratings
Symbol
Parameter
NDP7050L
NDB7050L
Units
VDSS
Drain-Source Voltage
50
V
VDGR
Drain-Gate Voltage (RGS 1 M)
50
V
VGSS
Gate-Source Voltage - Continuous - Nonrepetitive (tP < 50 µs)
± 20
V
± 40
ID
Drain Current - Continuous - Pulsed
75
A
225
PD
Total Power Dissipation @ TC = 25°C Derate above 25°C
150
W
1
W/
TJ,TSTG
Operating and Storage Temperature Range
-65 to 175
NDB7050L Features
`75A, 50V, RDS(ON) = 0.015 @ VGS = 5V `Low drive requirements allowing operation directly from logic drivers. VGS(TH) < 2.0V. `Critical DC electrical parameters specified at elevated temperature. `Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. `175°C maximum junction temperature rating. `High density cell design for extremely low RDS(ON). `TO-220 and TO-263 (D2PAK) package for both through hole and surface mount applications.
NDB7051 Parameters
Technical/Catalog Information
NDB7051
Vendor
Fairchild Semiconductor
Category
Discrete Semiconductor Products
Mounting Type
Surface Mount
FET Polarity
N-Channel
Drain to Source Voltage (Vdss)
50V
Current - Continuous Drain (Id) @ 25° C
70A
Rds On (Max) @ Id, Vgs
13 mOhm @ 35A, 10V
Input Capacitance (Ciss) @ Vds
1930pF @ 25V
Power - Max
130W
Packaging
Tape & Reel (TR)
Gate Charge (Qg) @ Vgs
100nC @ 10V
Package / Case
D²Pak, SMD-220, TO-263 (2 leads + tab)
FET Feature
Standard
Lead Free Status
Lead Free
RoHS Status
RoHS Compliant
Other Names
NDB7051 NDB7051
NDB7051 General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
NDB7051 Maximum Ratings
Symbol
Parameter
NDP7051
NDB7051
Units
VDSS
Drain-Source Voltage
50
V
VDGR
Drain-Gate Voltage (RGS < 1 M)
50
V
VDSS
Gate-Source Voltage - Continuous - Nonrepetitive (tP < 50 s)
± 20
V
± 40
ID
Drain Current - Continuous - Pulsed
70
A
210
PD
Total Power Dissipation @ TC = 25°C Derate above 25°C
130
W
0.87
W/
TJ,TSTG
Operating and Storage Temperature
-65 to 175
TL
Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
275
NDB7051 Features
`70A, 50V. RDS(ON) = 0.013 @ VGS=10V. `Critical DC electrical parameters specified at elevated temperature. `Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. `175°C maximum junction temperature rating. `High density cell design for extremely low RDS(ON). `TO-220 and TO-263 (D2PAK) package for both through hole and surface mount applications.
NDB7051L General Description
These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
NDB7051L Maximum Ratings
Symbol
Parameter
NDP7051L
NDB7051L
Units
VDSS
Drain-Source Voltage
50
V
VDGR
Drain-Gate Voltage (RGS 1 M)
50
V
VGSS
Gate-Source Voltage - Continuous - Nonrepetitive (tP < 50 µs)
±16
V
±25
ID
Drain Current - Continuous - Pulsed
67
A
200
PD
Total Power Dissipation @ TC = 25°C Derate above 25°C
130
W
0.87
W/
TJ,TSTG
Operating and Storage Temperature Range
-65 to 175
NDB7051L Features
`67 A, 50 V. RDS(ON) = 0.0145 @ VGS= 5 V RDS(ON) = 0.0115 @ VGS= 10 V. `Low drive requirements allowing operation directly from logic drivers. VGS(TH) < 2.0V. `Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. `175°C maximum junction temperature rating. `High density cell design for extremely low RDS(ON). `TO-220 and TO-263 (D2PAK) package for both through hole and surface mount applications.