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DDR10-33, DDR110-27T7RL, DDR12-24D08-A

Table of contents:
Info of DDR10-33
Info of DDR110-27T7RL
Info of DDR12-24D08-A

DDR10-33, DDR110-27T7RL, DDR12-24D08-A Selling Leads, Datasheet

MFG:ST Package Cooled:N/A D/C:2004

DDR10-33, DDR110-27T7RL, DDR12-24D08-A Picture

DDR10-33, DDR110-27T7RL, DDR12-24D08-A Datasheet download

Five Points

Part Number: DDR10-33

MFG: ST

Package Cooled: N/A

D/C: 2004

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DDR110-27T7RL General Description

The DDR110 provides 10 bits resistor Network to be used for SDR/DDR (double data rate) SDRAM busTermination.

This device has a series resistors (Rs) to reduce signalreflectionnoise.Thiseliminatestheneedfor externalterminatingresistors.

TheDDRTerminationNerworkisenabledwiththe output Enable pin (OE). When OE is HIGH Inputs are connected to Outputs (A connected to B). When OE is LOW every inputs are in High impedancestate(Hi-Z).

The DDR Termination Network is a bidirectional device when the internal switch is ON. When the switch is OFF, the device will block current in both directions.

This device is made using ST IPAD^TM (Integrated Passive&Activedevices)technology.

DDR110-27T7RL Maximum Ratings

Symbol	Parameter	TestConditions	Value			Unit
			Tambient=25°C
			Min.	Typ.	Max.
V_CC	Supplyvoltagerange		-0.5	5	7	V
V_IN	InputvoltagerangeDQ0/7,DM0, DQS0		-0.5		7	V
V_TT	Terminationvoltage		-0.5		7	V
V_OE	TerminationEnableVoltagerange		-0.5		7	V
I_IN	Continuousinputcurrent				30	mA
V_ESD	ESDratings(input/outputYOE)	HBMMILSTD883C			2	kV
T_STG	Storagetemperature		-65		150	°C

DDR110-27T7RL Features

10bitsTerminationNetwork.
IntegratedTerminationresistor(Rs)
EnableinputTTLlevelcompatible
Impedancematching±2%(A0-B0/An-Bn)
Optimized Low Crosstalk for parallel
TerminationtoVtt.
OptimizedLowpropagationdelay

DDR110-27T7RL Typical Application

DDR(doubledatarate)TerminationNetworkusedon.
Motherboard
Workstation
Server
Notebooks

DDR110-27T7RL Connection Diagram

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