Features: 10bitsTerminationNetwork.IntegratedTerminationresistor(Rs)EnableinputTTLlevelcompatibleImpedancematching±2%(A0-B0/An-Bn)Optimized Low Crosstalk for parallelTerminationtoVtt.OptimizedLowpropagationdelayApplicationDDR(doubledatarate)TerminationNetworkusedon.MotherboardWorkstationServerNote...
DDR110-27T7RL: Features: 10bitsTerminationNetwork.IntegratedTerminationresistor(Rs)EnableinputTTLlevelcompatibleImpedancematching±2%(A0-B0/An-Bn)Optimized Low Crosstalk for parallelTerminationtoVtt.OptimizedLowpro...
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Symbol |
Parameter |
TestConditions |
Value |
Unit | ||
Tambient=25°C | ||||||
Min. |
Typ. |
Max. | ||||
VCC |
Supplyvoltagerange |
|
-0.5 |
5 |
7 |
V |
VIN |
InputvoltagerangeDQ0/7,DM0, |
|
-0.5 |
|
7 |
V |
VTT |
Terminationvoltage |
|
-0.5 |
|
7 |
V |
VOE |
TerminationEnableVoltagerange |
|
-0.5 |
|
7 |
V |
IIN |
Continuousinputcurrent |
|
|
|
30 |
mA |
VESD |
ESDratings(input/outputYOE) |
HBMMILSTD883C |
|
|
2 |
kV |
TSTG |
Storagetemperature |
|
-65 |
|
150 |
°C |
The DDR110-27T7RL provides 10 bits resistor Network to be used for SDR/DDR (double data rate) SDRAM busTermination.
This DDR110-27T7RL has a series resistors (Rs) to reduce signalreflectionnoise.Thiseliminatestheneedfor externalterminatingresistors.
TheDDRTerminationNerworkisenabledwiththe output Enable pin (OE). When OE is HIGH Inputs are connected to Outputs (A connected to B). When OE is LOW every inputs are in High impedancestate(Hi-Z).
The DDR Termination Network is a bidirectional device when the internal switch is ON. When the switch is OFF, the DDR110-27T7RL will block current in both directions.
The DDR110-27T7RL is made using ST IPADTM (Integrated Passive&Activedevices)technology.