82801AA, 82801AB, 82801AB-1 Selling Leads, Datasheet
MFG:INTEL Package Cooled:BGA D/C:08+
82801AA, 82801AB, 82801AB-1 Datasheet download
Part Number: 82801AA
MFG: INTEL
Package Cooled: BGA
D/C: 08+
82801AA, 82801AB, 82801AB-1
- Table of contents:
Info of 82801AA
Info of 82801AB
Info of 82801AB-1
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About 82801AA
PDF/DataSheet Download
Datasheet: 82801AA
File Size: 2191976 KB
Manufacturer: INTEL [Intel Corporation]
Download : Click here to Download
About 82801AB
PDF/DataSheet Download
Datasheet: 82801AB
File Size: 2191976 KB
Manufacturer: INTEL [Intel Corporation]
Download : Click here to Download
About 82801AA
PDF/DataSheet Download
Datasheet: 82801AA
File Size: 2191976 KB
Manufacturer: INTEL [Intel Corporation]
Download : Click here to Download
82801AA Maximum Ratings
Case Temperature under Bias. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0to +100
Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -55 to +150
Voltage on Any 3.3V Pin with Respect to Ground. . . . . . . . . . . . . . . . . . .....-0.5V to Vcc + 0.3V
Voltage on Any 5V Tolerant Pin with Respect to Ground (VREF=5V). . .....-0.5V to VREF + 0.3V
1.8V Supply Voltage with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . . ..-0.3V to VREF + 2.7V
3.3V Supply Voltage with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .-0.5V to +4.6V
5.0V Supply Voltage (Vref) with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . ...-0.5V to +5.5V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 W
Warning: Stressing the device beyond the "Absolute Maximum Ratings" may cause permanent damage. These are stress ratings only. Operating beyond the "Operating Conditions" is not recommended and extended exposure beyond "Operating Conditions" may affect reliability.
Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -55 to +150
Voltage on Any 3.3V Pin with Respect to Ground. . . . . . . . . . . . . . . . . . .....-0.5V to Vcc + 0.3V
Voltage on Any 5V Tolerant Pin with Respect to Ground (VREF=5V). . .....-0.5V to VREF + 0.3V
1.8V Supply Voltage with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . . ..-0.3V to VREF + 2.7V
3.3V Supply Voltage with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .-0.5V to +4.6V
5.0V Supply Voltage (Vref) with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . ...-0.5V to +5.5V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 W
Warning: Stressing the device beyond the "Absolute Maximum Ratings" may cause permanent damage. These are stress ratings only. Operating beyond the "Operating Conditions" is not recommended and extended exposure beyond "Operating Conditions" may affect reliability.
82801AA Features
PCI Bus Interface
-Supports PCI at 33 MHz
-Supports PCI Rev 2.2 Specification
-133 MByte/sec Maximum Throughput
-Master PCI Device Support: up to 6 for the ICH and up to 4 for the ICH0
Integrated IDE Controller
-Independent Timing of Up to 4 Drives
-The ICH Supports Ultra ATA/66 Mode (66 Mbytes/sec)
-Supports Ultra ATA/33 Mode (33 Mbytes/sec)
-PIO Mode 4 Transfers up to 14 Mbytes/s
-Separate IDE Connections for Primary and Secondary Cables
-Implements Write Ping-Pong Buffer for faster write performance
USB
-UHCI Implementation With 2 Ports
-Supports Wake-up From Sleeping States S1-S4
-Supports Legacy Keyboard/Mouse Software
-USB Revision 1.1 Compliant
AC'97 Link for Audio and Telephony CODECs
-AC'97 2.1 Compliant
-5 Independent Bus Master Logic for PCM In,PCM Out, Mic Input, Modem In, Modem Out
-Separate Independent PCI Functions for Audio and Modem
-Supports wake-up events
Interrupt Controller
-Two Cascaded 82C59
-Integrated I/O APIC Capability
-15 Interrupts Support in 8259 Mode, 24 Supported in I/O APIC Mode.
-Supports Serial Interrupt Protocol
Timers Based on 82C54
System Timer, Refresh Request, Speaker Tone Output
3.3 V Operation With 5 V Tolerant Buffers for IDE and PCI signals.
241 BGA package
GPIO
-TTL, Open-Drain, Inversion
Power Management Logic
-ACPI 1.0 Compliant
-Support for APM-Based Legacy Power Management for Non-ACPI Implementations
-ACPI Defined Power States (S1, S3, S4, S5)
-ACPI Power Management Timer
-SMI# Generation
-All Registers Readable/Restorable for Proper Resume from 0 V Suspend States
-PCI PME#
Low Pin count (LPC) Interface
-Allows Connection of Legacy ISA and X-Bus Devices such as Super I/O
-Supports Two Master/DMA Devices.
Enhanced DMA Controller
-Two Cascaded 8237 DMA Controllers
-PCI DMA: Supports PC/PCI - Includes Two PC/PCI REQ#/GNT# Pairs
-Supports LPC DMA
-Supports DMA Collection Buffer to Provide Type-F DMA Performance for All DMA Channels
Real - Time Clock
-256-byte Battery-Backed CMOS RAM
-Hardware implementation to indicate Century Rollover
System TCO Reduction Circuits
-Timers to Generate SMI# and Reset Upon Detection of locked system
-Timers to Detect Improper Processor Reset
-Integrated Processor Frequency Strap Logic
SM Bus
-Host Interface Allows Processor to Communicate via SM Bus
-Compatible With Most 2-Wire Components that are Also I2 C compatible
Supports ISA Bus via External PCI-ISA Bridge
Firmware Hub (FWH) Interface The 82801AA provides Alert On LAN*
Support
-Supports PCI at 33 MHz
-Supports PCI Rev 2.2 Specification
-133 MByte/sec Maximum Throughput
-Master PCI Device Support: up to 6 for the ICH and up to 4 for the ICH0
Integrated IDE Controller
-Independent Timing of Up to 4 Drives
-The ICH Supports Ultra ATA/66 Mode (66 Mbytes/sec)
-Supports Ultra ATA/33 Mode (33 Mbytes/sec)
-PIO Mode 4 Transfers up to 14 Mbytes/s
-Separate IDE Connections for Primary and Secondary Cables
-Implements Write Ping-Pong Buffer for faster write performance
USB
-UHCI Implementation With 2 Ports
-Supports Wake-up From Sleeping States S1-S4
-Supports Legacy Keyboard/Mouse Software
-USB Revision 1.1 Compliant
AC'97 Link for Audio and Telephony CODECs
-AC'97 2.1 Compliant
-5 Independent Bus Master Logic for PCM In,PCM Out, Mic Input, Modem In, Modem Out
-Separate Independent PCI Functions for Audio and Modem
-Supports wake-up events
Interrupt Controller
-Two Cascaded 82C59
-Integrated I/O APIC Capability
-15 Interrupts Support in 8259 Mode, 24 Supported in I/O APIC Mode.
-Supports Serial Interrupt Protocol
Timers Based on 82C54
System Timer, Refresh Request, Speaker Tone Output
3.3 V Operation With 5 V Tolerant Buffers for IDE and PCI signals.
241 BGA package
GPIO
-TTL, Open-Drain, Inversion
Power Management Logic
-ACPI 1.0 Compliant
-Support for APM-Based Legacy Power Management for Non-ACPI Implementations
-ACPI Defined Power States (S1, S3, S4, S5)
-ACPI Power Management Timer
-SMI# Generation
-All Registers Readable/Restorable for Proper Resume from 0 V Suspend States
-PCI PME#
Low Pin count (LPC) Interface
-Allows Connection of Legacy ISA and X-Bus Devices such as Super I/O
-Supports Two Master/DMA Devices.
Enhanced DMA Controller
-Two Cascaded 8237 DMA Controllers
-PCI DMA: Supports PC/PCI - Includes Two PC/PCI REQ#/GNT# Pairs
-Supports LPC DMA
-Supports DMA Collection Buffer to Provide Type-F DMA Performance for All DMA Channels
Real - Time Clock
-256-byte Battery-Backed CMOS RAM
-Hardware implementation to indicate Century Rollover
System TCO Reduction Circuits
-Timers to Generate SMI# and Reset Upon Detection of locked system
-Timers to Detect Improper Processor Reset
-Integrated Processor Frequency Strap Logic
SM Bus
-Host Interface Allows Processor to Communicate via SM Bus
-Compatible With Most 2-Wire Components that are Also I2 C compatible
Supports ISA Bus via External PCI-ISA Bridge
Firmware Hub (FWH) Interface The 82801AA provides Alert On LAN*
Support
82801AA Connection Diagram
82801AB Maximum Ratings
Case Temperature under Bias. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0to +100
Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -55 to +150
Voltage on Any 3.3V Pin with Respect to Ground. . . . . . . . . . . . . . . . . . .....-0.5V to Vcc + 0.3V
Voltage on Any 5V Tolerant Pin with Respect to Ground (VREF=5V). . .....-0.5V to VREF + 0.3V
1.8V Supply Voltage with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . . ..-0.3V to VREF + 2.7V
3.3V Supply Voltage with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .-0.5V to +4.6V
5.0V Supply Voltage (Vref) with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . ...-0.5V to +5.5V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 W
Warning: Stressing the device beyond the "Absolute Maximum Ratings" may cause permanent damage. These are stress ratings only. Operating beyond the "Operating Conditions" is not recommended and extended exposure beyond "Operating Conditions" may affect reliability.
Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -55 to +150
Voltage on Any 3.3V Pin with Respect to Ground. . . . . . . . . . . . . . . . . . .....-0.5V to Vcc + 0.3V
Voltage on Any 5V Tolerant Pin with Respect to Ground (VREF=5V). . .....-0.5V to VREF + 0.3V
1.8V Supply Voltage with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . . ..-0.3V to VREF + 2.7V
3.3V Supply Voltage with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .-0.5V to +4.6V
5.0V Supply Voltage (Vref) with Respect to Vss . . . . . . . . . . . . . . . . . . . . . . ...-0.5V to +5.5V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 W
Warning: Stressing the device beyond the "Absolute Maximum Ratings" may cause permanent damage. These are stress ratings only. Operating beyond the "Operating Conditions" is not recommended and extended exposure beyond "Operating Conditions" may affect reliability.
82801AB Features
PCI Bus Interface
-Supports PCI at 33 MHz
-Supports PCI Rev 2.2 Specification
-133 MByte/sec Maximum Throughput
-Master PCI Device Support: up to 6 for the ICH and up to 4 for the ICH0
Integrated IDE Controller
-Independent Timing of Up to 4 Drives
-The ICH Supports Ultra ATA/66 Mode (66 Mbytes/sec)
-Supports Ultra ATA/33 Mode (33 Mbytes/sec)
-PIO Mode 4 Transfers up to 14 Mbytes/s
-Separate IDE Connections for Primary and Secondary Cables
-Implements Write Ping-Pong Buffer for faster write performance
USB
-UHCI Implementation With 2 Ports
-Supports Wake-up From Sleeping States S1-S4
-Supports Legacy Keyboard/Mouse Software
-USB Revision 1.1 Compliant
AC'97 Link for Audio and Telephony CODECs
-AC'97 2.1 Compliant
-5 Independent Bus Master Logic for PCM In,PCM Out, Mic Input, Modem In, Modem Out
-Separate Independent PCI Functions for Audio and Modem
-Supports wake-up events
Interrupt Controller
-Two Cascaded 82C59
-Integrated I/O APIC Capability
-15 Interrupts Support in 8259 Mode, 24 Supported in I/O APIC Mode.
-Supports Serial Interrupt Protocol
Timers Based on 82C54
System Timer, Refresh Request, Speaker Tone Output
3.3 V Operation With 5 V Tolerant Buffers for IDE and PCI signals.
241 BGA package
GPIO
-TTL, Open-Drain, Inversion
Power Management Logic
-ACPI 1.0 Compliant
-Support for APM-Based Legacy Power Management for Non-ACPI Implementations
-ACPI Defined Power States (S1, S3, S4, S5)
-ACPI Power Management Timer
-SMI# Generation
-All Registers Readable/Restorable for Proper Resume from 0 V Suspend States
-PCI PME#
Low Pin count (LPC) Interface
-Allows Connection of Legacy ISA and X-Bus Devices such as Super I/O
-Supports Two Master/DMA Devices.
Enhanced DMA Controller
-Two Cascaded 8237 DMA Controllers
-PCI DMA: Supports PC/PCI - Includes Two PC/PCI REQ#/GNT# Pairs
-Supports LPC DMA
-Supports DMA Collection Buffer to Provide Type-F DMA Performance for All DMA Channels
Real - Time Clock
-256-byte Battery-Backed CMOS RAM
-Hardware implementation to indicate Century Rollover
System TCO Reduction Circuits
-Timers to Generate SMI# and Reset Upon Detection of locked system
-Timers to Detect Improper Processor Reset
-Integrated Processor Frequency Strap Logic
SM Bus
-Host Interface Allows Processor to Communicate via SM Bus
-Compatible With Most 2-Wire Components that are Also I2 C compatible
Supports ISA Bus via External PCI-ISA Bridge
Firmware Hub (FWH) Interface The 82801AA provides Alert On LAN*
Support
-Supports PCI at 33 MHz
-Supports PCI Rev 2.2 Specification
-133 MByte/sec Maximum Throughput
-Master PCI Device Support: up to 6 for the ICH and up to 4 for the ICH0
Integrated IDE Controller
-Independent Timing of Up to 4 Drives
-The ICH Supports Ultra ATA/66 Mode (66 Mbytes/sec)
-Supports Ultra ATA/33 Mode (33 Mbytes/sec)
-PIO Mode 4 Transfers up to 14 Mbytes/s
-Separate IDE Connections for Primary and Secondary Cables
-Implements Write Ping-Pong Buffer for faster write performance
USB
-UHCI Implementation With 2 Ports
-Supports Wake-up From Sleeping States S1-S4
-Supports Legacy Keyboard/Mouse Software
-USB Revision 1.1 Compliant
AC'97 Link for Audio and Telephony CODECs
-AC'97 2.1 Compliant
-5 Independent Bus Master Logic for PCM In,PCM Out, Mic Input, Modem In, Modem Out
-Separate Independent PCI Functions for Audio and Modem
-Supports wake-up events
Interrupt Controller
-Two Cascaded 82C59
-Integrated I/O APIC Capability
-15 Interrupts Support in 8259 Mode, 24 Supported in I/O APIC Mode.
-Supports Serial Interrupt Protocol
Timers Based on 82C54
System Timer, Refresh Request, Speaker Tone Output
3.3 V Operation With 5 V Tolerant Buffers for IDE and PCI signals.
241 BGA package
GPIO
-TTL, Open-Drain, Inversion
Power Management Logic
-ACPI 1.0 Compliant
-Support for APM-Based Legacy Power Management for Non-ACPI Implementations
-ACPI Defined Power States (S1, S3, S4, S5)
-ACPI Power Management Timer
-SMI# Generation
-All Registers Readable/Restorable for Proper Resume from 0 V Suspend States
-PCI PME#
Low Pin count (LPC) Interface
-Allows Connection of Legacy ISA and X-Bus Devices such as Super I/O
-Supports Two Master/DMA Devices.
Enhanced DMA Controller
-Two Cascaded 8237 DMA Controllers
-PCI DMA: Supports PC/PCI - Includes Two PC/PCI REQ#/GNT# Pairs
-Supports LPC DMA
-Supports DMA Collection Buffer to Provide Type-F DMA Performance for All DMA Channels
Real - Time Clock
-256-byte Battery-Backed CMOS RAM
-Hardware implementation to indicate Century Rollover
System TCO Reduction Circuits
-Timers to Generate SMI# and Reset Upon Detection of locked system
-Timers to Detect Improper Processor Reset
-Integrated Processor Frequency Strap Logic
SM Bus
-Host Interface Allows Processor to Communicate via SM Bus
-Compatible With Most 2-Wire Components that are Also I2 C compatible
Supports ISA Bus via External PCI-ISA Bridge
Firmware Hub (FWH) Interface The 82801AA provides Alert On LAN*
Support
82801AB Connection Diagram
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