82801DB

• Compliance with Advanced Configuration and Power Interface and PCI Power Management standards
• Support for wake-up on interesting packets and link status change
• Support for remote power-up using Wake on LAN (WOL) technology
• Deep power-down mode support
• Support of Wired for Management (WfM) Rev 2.0
• Backward compatible software with 82557, 82558 and 82559
• TCP/UDP checksum off load capabilities
• Support for Intel's Adaptive Technology

The ICH4's integrated LAN controller includes a 32-bit PCI controller, ICH4 provides enhanced scatter-gather bus mastering capabilities and enables the LAN controller to perform high-speed data transfers over the PCI bus. ICH4's bus master capabilities enable the component to process high level commands and perform multiple operations, which lowers processor utilization by offloading communication tasks from the processor. Two large transmit and receive FIFOs of 3 KB each help prevent data underruns and overruns while waiting for bus accesses. This enables the integrated LAN controller to transmit data with minimum interframe spacing (IFS).

The ICH4 integrated LAN controller can operate in either full-duplex or half-duplex mode. In fullduplex mode the LAN controller adheres with the IEEE 802.3x Flow Control specification. Half duplex performance is enhanced by a proprietary collision reduction mechanism.

The ICH4 integrated LAN controller also includes an interface to a serial (4-pin) EEPROM. The EEPROM provides power-on initialization for hardware and software configuration parameters.

From a software perspective, the integrated LAN controller appears to reside on the secondary side of the ICH4's virtual PCI-to-PCI Bridge (see Section 5.1.2). ICH4 is typically Bus 1, but may be assigned a different number, depending on system configuration.