W30540TRC, W305B, W305BHH Selling Leads, Datasheet
MFG:N/A Package Cooled:N/A D/C:09+
W30540TRC, W305B, W305BHH Datasheet download
Part Number: W30540TRC
MFG: N/A
Package Cooled: N/A
D/C: 09+
W30540TRC, W305B, W305BHH
- Table of contents:
Info of W30540TRC
Info of W305B
Info of W305BHH
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About W3000
PDF/DataSheet Download
Datasheet: W3000
File Size: 335233 KB
Manufacturer: AGERE [Agere Systems]
Download : Click here to Download
About W305B
PDF/DataSheet Download
Datasheet: W305B
File Size: 253307 KB
Manufacturer: CYPRESS [Cypress Semiconductor]
Download : Click here to Download
About W305BHH
PDF/DataSheet Download
Datasheet: W305BHH
File Size: 253307 KB
Manufacturer: CYPRESS [Cypress Semiconductor]
Download : Click here to Download
W305B Maximum Ratings
| Parameter | Description | Min. | Max. | Unit |
| VDDQ3 | 3.3V Core Supply Voltage | 0.5 | 4.6 | V |
| VDDQ2 | 2.5V I/O Supply Voltage | 0.5 | 3.6 | V |
| TS | Storage Temperature | 65 | 150 | °C |
| Vi/o3 | 3.3V Core Supply Voltage | 0.5 | 4.6 | V |
| Vi/o3 | 2.5V I/O Supply Voltage | 0.5 | 3.6 | V |
| ESD prot. | Input ESD Protection | 2000 | V |
W305B Features
• Single chip FTG solution for Intel Solano/810E/810
• Programmable clock output frequency with less than 1 MHz increment
• Integrated fail-safe Watchdog timer for system recovery
• Automatically switch to HW selected or SW programmed clock frequency when Watchdog timer time-out
• Capable of generating system RESET after a Watchdog timer time-out occurs or a change in output frequency via SMBus interface
• Support SMBus byte read/write and block read/write operations to simplify system BIOS development
• Vendor ID and Revision ID support
• Programmable drive strength for SDRAM and PCI output clocks
• Programmable output skew between CPU, AGP, PCI and SDRAM
• Maximized EMI suppression using Cypress's Spread Spectrum Technology
• Low jitter and tightly controlled clock skew
• Two copies of CPU clock
• Thirteen copies of SDRAM clock
• Eight copies of PCI clock
• One copy of synchronous APIC clock
• Three copies of 66-MHz outputs
• Three copies of 48-MHz outputs
• One copy of double strength 14.31818-MHz reference clock
• One RESET output for system recovery
• SMBus interface for turning off unused clocks
• Programmable clock output frequency with less than 1 MHz increment
• Integrated fail-safe Watchdog timer for system recovery
• Automatically switch to HW selected or SW programmed clock frequency when Watchdog timer time-out
• Capable of generating system RESET after a Watchdog timer time-out occurs or a change in output frequency via SMBus interface
• Support SMBus byte read/write and block read/write operations to simplify system BIOS development
• Vendor ID and Revision ID support
• Programmable drive strength for SDRAM and PCI output clocks
• Programmable output skew between CPU, AGP, PCI and SDRAM
• Maximized EMI suppression using Cypress's Spread Spectrum Technology
• Low jitter and tightly controlled clock skew
• Two copies of CPU clock
• Thirteen copies of SDRAM clock
• Eight copies of PCI clock
• One copy of synchronous APIC clock
• Three copies of 66-MHz outputs
• Three copies of 48-MHz outputs
• One copy of double strength 14.31818-MHz reference clock
• One RESET output for system recovery
• SMBus interface for turning off unused clocks
W305B Connection Diagram
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