ANTENNA CHIP GPS 1.575GHZ
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.
Series: | - | Manufacturer: | Pulse Electronics Corporation |
Antenna Type: | Chip | Number of Bands: | 1 |
Frequency: | 1575.42MHz | VSWR: | - |
Gain: | * | Termination: | Chip |
Package / Case : | NFBGA-144 | Mounting Type: | PCB, Surface Mount |
Height (Max): | 0.04" (1.1mm) |
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only, as shown in Table 2. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.
Parameter | Symbol | Min | Max | Unit |
Ambient Operating Temperature | TA | 35 | 85 | |
Storage Temperature | Tstg | 65 | 150 | |
Lead Temperature (soldering, 10 s) | - | - | 300 | |
Positive Supply Voltage | VCC | 0.3 | 4.5 | V |
Power Dissipation | PD | - | 650 | mW |
ac p-p Input Voltage | Vp-p | 0.3 | VCC | V |
Digital Voltages | - | 0.3 | VCC | V |
The W3011 1 GHz Quadrature Modulator is a monolithic integrated circuit that provides directmodulation of an RF carrier by I & Q basebandinputs. It is particularly suited for use in mobile and handheld cellular telephones designed to the IS-136 (North American 824 MHz to 849 MHz), PDC (Japan RCR-STD27 889 MHz to 958 MHz), and other digital personal-communications standards.
The circuit block diagram is shown in Figure 1. From two LO signals, LOL and LOH, the offset mixer produces an internal LO signal, which prevents the external VCOs from being pulled by the large transmitted signal. The phase shifter splits the LO signal into two carriers with 90° phase separation and equal amplitude.
These signals are fed to the in-phase (I) and quadrature-phase (Q) double-balanced mixers. The resulting signals are summed and fed into the output amplifier. This amplifier can provide 0 dBm linear output power, minimum, into a 50 load.
The output power can be attenuated up to 50 dB by applying a control voltage to the APC input. Nominally, the output power is at maximum (+3 dBm) with VAPC > 2.2 V, and at minimum (50 dBm) with VAPC < 0.8 V.
A CMOS/TTL-compatible logic input allows the device to be put into a powerdown mode in which less than 10 A of supply current is consumed.