W3030

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.

The W3030 is a monolithic integrated circuit that provides most of the receive path functions required to meet the IS-136 (and IS-54)standard. The W3030 converts FM or digitally modulated IF carriers up to 200 MHz and provides required IF gain and separate baseband detectors for the two modulation modes.

The W3030 is organized into three subfunctions (see Figure 2):

1. First IF mixer/amplifier
2. Analog second IF
3. Digital second IF sections

(Note that the electrical specification tables correspond to each subfunction.)

Each section has a buffered output to allow for external filtering, which also provides flexibility in system architecture selection. The first IF mixer section provides 30 dB of fixed voltage conversion gain (power gain = 17 dB). The first IF mixer also performs down-conversion to the 0.2 MHz-2.0 MHz range, which allows the use of inexpensive ceramic filters at two points in the signal path. In the second IF section, the signal path may be split between two parallel amplifier/demodulator sections. In the analog second IF, there is a 40 dB amplifier followed by a 60 dB hard-limiting amplifier and an FM quadrature detector (noncoherent discriminator). The signal path between the 40 dB and 60 dB amplifier stages is brought off-chip for external filtering purposes. In digital mode, an AGC amplifier provides gain between 10 dB and 80 dB. The digital signal is demodulated in double-balanced mixers that are fed with an external local oscillator (LO) signal. The external LO passes through a divide-by-four counter to provide the final IF LO frequency. This architecture greatly reduces the possibility of feedback of the external LO signal to the IF input, which would cause dc offsets at the I & Q outputs. This circuit also provides a 90°phase shift of the LO that is independent of duty cycle. The resulting I & Q differential pairs can be level-shifted using the VCM input pin, providing flexibility in interfacing to digital processing ICs.

A pair of logic inputs allows the device to be put into a powerdown mode and one of two partially enabled modes (analog or digital only), or a fully enabled mode, allowing the use of analog RSSI while in digital receive mode.