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The VNS1NV04D is a device formed by two monolithic OMNIFET II chips housed in a standard SO-8 package. The OMNIFET II are designed in STMicroelectronics VIPower M0-3 Technology: they are intended for replacement of standard Power MOSFETS from DC up to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments.
Fault feedback can be detected by monitoring the voltage at the input pin.
VNS1NV04D Maximum Ratings
Symbol
Parameter
Value
Unit
VDSn
Drain-source Voltage (VINn=0V)
Internally Clamped
V
VINn
Input Voltage
Internally Clamped
V
IINn
Input Current
+/-20
mA
RINMINn
Minimum Input Series Impedance
330
IDn
Drain Current
Internally Limited
A
IRn
Reverse DC Output Current
-3
A
VESD1
Electrostatic Discharge (R=1.5K, C=100pF)
4000
V
VESD2
Electrostatic Discharge on output pins only (R=330, C=150pF)
16500
V
Ptot
Total Dissipation at Tc=25°C
4
W
Tj
Operating Junction Temperature
Internally limited
Tc
Case Operating Temperature
Internally limited
Tstg
Storage Temperature
-55 to 150
VNS1NV04D Features
During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path.
The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50KHz. The only difference from the user's standpoint is that a small DC current IISS (typ.100mA) flows into the INPUT pin in order to supply the internal circuitry.
The device integrates: - OVERVOLTAGE CLAMP PROTECTION:internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads.
- LINEAR CURRENT LIMITER CIRCUIT: limits the drain current ID to Ilim whatever the INPUT pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough,junction temperature may reach the overtemperature threshold Tjsh.
- OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast,accurate detection of the junction temperature.Overtemperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15°C below shut-down temperature.
- STATUS FEEDBACK: in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V.This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS.
Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit.
VNS1NV04D Connection Diagram
VNS3NV04 Parameters
Technical/Catalog Information
VNS3NV04
Vendor
STMicroelectronics
Category
Integrated Circuits (ICs)
Package / Case
8-SOIC (3.9mm Width)
Mounting Type
Surface Mount
Type
Low Side
Voltage - Supply
-
On-State Resistance
120 mOhm
Current - Output / Channel
-
Current - Peak Output
5A
Packaging
Tube
Input Type
Non-Inverting
Number of Outputs
1
Operating Temperature
-
Drawing Number
*
Lead Free Status
Lead Free
RoHS Status
RoHS Compliant
Other Names
VNS3NV04 VNS3NV04
VNS3NV04 General Description
The VNN3NV04, VNS3NV04, VND3NV04 VND3NV04-1, are monolithic devices designed in STMicroelectronics VIPower M0-3 Technology,intended for replacement of standard Power MOSFETS from DC up to 50KHz applications.Built in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments.
Fault feedback can be detected by monitoring the voltage at the input pin.
VNS3NV04 Maximum Ratings
Symbol
Parameter
Value
Unit
SOT-223
SO-8
DPAK/IPAK
VDS
Drain-source Voltage (Vin = 0)
Internally Clamped
V
VIN
Input Voltage
Internally Clamped
V
IIN
Input Current
+/-20
mA
RIN MIN
Minimum Input Series Impedance
220
ID
Drain Current
Internally Clamped
A
IR
Reverse DC Output Current
-5.5
A
VESD1
Electrostatic discharge(C= 100 pF, R=1.5 K)
4000
V
VESD2
Electrostatic Discharge on output pin only R=330, C=150pF)
16500
V
Ptot
Total Dissipation at TC=25°C
7
8.3
35
W
Tj
Operating Junction Temperature
Internally Limited
TC
Case operating temperature
Internally Limited
Tstg
Storage Temperature
-55 to 150
VNS3NV04 Features
During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path.The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50KHz. The only difference from the user's standpoint is that a small DC current IISS (typ.100mA) flows into the INPUT pin in order to supply the internal circuitry.
The device integrates: - OVERVOLTAGE CLAMP PROTECTION:internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads.
- LINEAR CURRENT LIMITER CIRCUIT:limits the drain current ID to Ilim whatever the INPUT pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough,junction temperature may reach the overtemperature threshold Tjsh.
- OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION:these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15°C below shut-down temperature.
- STATUS FEEDBACK:in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation:no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS.
Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit.
The VNS3NV04D is a device formed by two monolithic OMNIFET II chips housed in a standard SO-8 package. The OMNIFET II are designed in STMicroelectronics VIPower M0-3 Technology: they are intended for replacement of standard Power MOSFETS from DC up to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments.
Fault feedback can be detected by monitoring the voltage at the input pin.
VNS3NV04D Maximum Ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source Voltage (Vin = 0V)
Internally Clamped
V
Vin
Input Voltage
Internally Clamped
V
IINn
Input Current
+/-20
mA
RINMINn
Minimum Input Series Impedance
220
IDn
Drain Current
Internally Limited
A
IRn
Reverse DC Output Current
-5.5
A
VESD1
Electrostatic Discharge ( R=1.5 K,C= 100 pF)
4000
V
VESD2
Electrostatic Discharge on output pins only (R=330, C=150pF)
16500
V
Ptot
Total Dissipation at Tc = 25 oC
4
W
Tj
Operating Junction Temperature
Internally Limited
Tc
Case Operating Temperature
Internally Limited
TSTG
Storage Temperature
-55 to 150
VNS3NV04D Features
During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path.
The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50KHz. The only difference from the user's standpoint is that a small DC current IISS (typ.100mA) flows into the INPUT pin in order to supply the internal circuitry.
The device integrates: - OVERVOLTAGE CLAMP PROTECTION:internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads.
- LINEAR CURRENT LIMITER CIRCUIT: limits the drain current ID to Ilim whatever the INPUT pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough,junction temperature may reach the overtemperature threshold Tjsh.
- OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast,accurate detection of the junction temperature.Overtemperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15°C below shut-down temperature.
- STATUS FEEDBACK: in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V.This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS.
Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit.