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This series of devices implements second generation MDmesh™ technology. This revolutionary Power MOSFET associates a new vertical structure to the Company's strip layout to yield one of the world's lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters.
STF12NM60N Maximum Ratings
Symbol
Parameter
Value
Unit
D²PAK/I²PAK TO-220/TO-247
TO-220FP
VDS
Drain-source voltage (VGS=0)
600
V
VGS
Gate-source voltage
± 25
V
ID
Drain current (continuous) at TC = 25
10
10(1)
A
ID
Drain current (continuous) at TC = 100
6.3
6.3(1)
A
IDM(2)
Drain current (pulsed)
40
40(1)
A
PTOT
Total dissipation at TC = 25
90
25
A
dv/dt (3)
Peak diode recovery voltage slope
15
V/ns
VISO
Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1s;TC=25)
--
2500
V
Tj,Tstg
Operating junction temperature Storage temperature
-55 to 150
1. Limited only by maximum temperature allowed 2. Pulse width limited by safe operating area 3. ISD 10A, di/dt 400A/s, VDD =80% V(BR)DSS
This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility