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GS9020, GS9020ACFV, GS9021A

Table of contents:
Info of GS9020
Info of GS9020ACFV
Info of GS9021A

GS9020, GS9020ACFV, GS9021A Selling Leads, Datasheet

MFG:1275 Package Cooled:QFP D/C:GFT

GS9020, GS9020ACFV, GS9021A Datasheet download

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Part Number: GS9020

MFG: 1275

Package Cooled: QFP

D/C: GFT

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GS9020 General Description

The GS9020 is specifically designed to deserialize SMPTE 259M serial digital signals. The inclusion of Error Detection and Handling (EDH) ensures the integrity of the data being received from the serial digital interface (SDI). Internal 75Ω termination resistors allow INTERLINX™ seamless connection with the GS9035 Reclocker or the GS9025 eceiver, thus providing a complete, high performance, digital video input processor with EDH, digital sync signal generation, and other system features.

The GS9020 also includes a parallel to serial converter and NRZI scrambler to provide re-serialized, EDH compliant data output. The EDH core implements EDH insertion and extraction according to SMPTE RP-165. This core also generates noise immune timing signals such as horizontal sync, vertical blanking, field ID and ancillary data identification. It also provides many system features such as a FIFO reset pulse (which can be programmed to coincide with either EAV or SAV), TRS-ID and ANC header cor rection, user controlled output blanking and ITU-R-601 output clipping. The GS9020 has an I²C (Inter-Integrated Circuit, I²C is a registered Trademark of Philips) serial interface bus and an 8-bit parallel port for external access to all error flags and device configuration bits.

GS9020 Maximum Ratings

PARAMETER VALUE

Supply Voltage                                                 -0.3V to 6.0V
Input Voltage Range (any input)                    -0.3 to VDD +0.3V
Operating Temperature Range                         0°C to 70°C
Storage Temperature                                       -55°C to 150°C
Lead Temperature (soldering, 10 sec)             260°C

GS9020 Features

• fully compatible with SMPTE 259M
• auto-standard operation to 540MHz
• embedded EDH and data processing core
• selectable loop through or re-serialized EDHprocessed serial output
• noise immune HVF timing signal outputs
• configurable FIFO reset pulse for clearing downstream FIFOs
• ANC header and TRS-ID correction for all standards
• user controlled output blanking
• ITU-R-601 output clipping for active picture area
• ancillary data indication
• low system power
• selectable I²C interface or 8-bit parallel port for access to EDH flags and device configuration bits
• EDH flags also available on dedicated pins
• seamless flag mapping to GS9021 EDH coprocessor
• 80 pin LQFP APPLICATIONS

GS9020 Typical Application

SMPTE 259M serial digital receiver for composite and component standards including 4:4:4:4 at 540Mb/s with EDH processing; Noise immune digital sync and timing generation; Cost effective EDH insertion and checking for serial routing and distribution applications.

GS9020 Connection Diagram

GS9021A General Description

The GS9021A implements error detection and handling (EDH) according to SMPTE RP-165. Interfacing to the parallel inputs of either the GS9002, GS9022 or GS9032 serial digital encoders, the GS9021A is primarily used on the transmit end of the SDI interface. The GS9021A provides EDH insertion and extraction for 4ƒsc NTSC, 4ƒsc PAL and all component PAL and NTSC standards including 4:2:2 (13.5MHz and 18MHz luminance sampling), and 4:4:4:4.

The GS9021A generates noise immune timing signals such as horizontal sync, vertical blanking and field ID. In addition, TRS-ID correction/insertion and data blanking are implemented for all standards.

A host interface, configurable as an 8-bit parallel interface or an I²C (I²C is a registered trademark of Philips) serial interface allows for communication with a microcontroller. The interface can be used to read and/or write the complete set of error flags and override the flag status prior to re-transmission. A 5-bit flag port provides access to all error flags on dedicated pins for applications where the microcontroller is not used. The device automatically determines the operating standard, but this can be overridden through the programming interface.

GS9021A Maximum Ratings

Supply Voltage ................-0.3V to 6.0V
Input Voltage Range (any input) ..-0.3 to VDD + 0.3V
Operating Temperature Range ........0 to 70
Storage Temperature............-55 to 150
Lead Temperature (soldering, 10 sec) ...... 260

GS9021A Features

• Error Detection and Handling (EDH) according to SMPTE RP-165
• drop-in replacement for the GS9021
• EDH insertion and extraction in one device
• auto-standard operation with override via host interface
• noise immune extraction of HVF timing signals
• TRS insertion/correction and ANC header correction for all standards
• ITU-R-601 output clipping for active picture area
• selectable I²C interface or 8-bit parallel port for access to EDH flags and device configuration bits
• all error flags available on dedicated output pins
• 24-bit Errored Field counter
• BYPASS mode to bypass EDH insertion/updating
• dynamic blanking control input
• 8-bit or 10-bit compatibility
• up to 54MHz operating frequency
• seamless flag-mapping with GS9020 serial digital video input processor

GS9021A Typical Application

EDH processing for SMPTE 259M serial digital interfaces for composite and component standards including 4:4:4:4 at 540Mb/s; Noise immune digital sync and timing generation. Source, destination, distribution and test equipment; General purpose, TRS formatted, blank video stream generator with EDH.

GS9021A Connection Diagram

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