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GS9000D

Features: • fully compatible with SMPTE 259M-ABC• decodes 8 and 10 bit serial digital signals for data rates to 270Mb/s• recommended alternative to GS9000C for use when interfacing directly to GS7025, GS9025A or GS9035A• incorporates automatic standards selection• 325...

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GS9000D: Features: • fully compatible with SMPTE 259M-ABC• decodes 8 and 10 bit serial digital signals for data rates to 270Mb/s• recommended alternative to GS9000C for use when interfacing...

GS9000D Data Sheet

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Part Number:
GS9000D
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/18

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Product Details

Description



Features:

• fully compatible with SMPTE 259M-ABC
• decodes 8 and 10 bit serial digital signals for data rates to 270Mb/s
• recommended alternative to GS9000C for use when interfacing directly to GS7025, GS9025A or GS9035A
• incorporates automatic standards selection
• 325mW power dissipation at 270MHz clock rate
• Pb-free and Green
• operates from single +5 or -5 volt supply
• 28 pin PLCC packaging




Application

• 4ƒSC and 4:2:2 serial digital interfaces
• Automatic standards select controller for serial routing and distribution applications




Specifications

PARAMETER
VALUE
Supply Voltage (VS = VDD - VSS)
Input Voltage Range (any input)
DC Input Current (any one input)
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 seconds)
7V
-0.3 to (VDD + 0.3)
±10A
0 to 70
-65 to +15
260





Description

The GS9000D is a CMOS integrated circuit specifically designed to deserialize SMPTE 259M serial digital signals at data rates up to 270Mb/s. The GS9000D is a pin and functional equivalent to the GS9000C, with the exception of SDI input levels which are compatible for direct interfacing to the GS7025, GS9025A and GS9035A.

The GS9000D incorporates a descrambler, serial to parallel convertor, sync processing unit, sync warning unit and automatic standards select circuitry.

Differential pseudo-ECL inputs for both serial clock and data are internally level shifted to CMOS levels. Digital outputs of GS9000D such as parallel data, parallel clock, HSYNC, Sync Warning and Standard Select are all TTL compatible. The GS9000D is packaged in a 28 pin PLCC and operates from a single 5 volt, ±5% power supply.






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