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GS9000B, GS9000C, GS9000D

GS9000B, GS9000C, GS9000D Selling Leads, Datasheet

MFG:GENNUM  Package Cooled:PLCC  D/C:05+

GS9000B, GS9000C, GS9000D Picture

GS9000B, GS9000C, GS9000D Datasheet download

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Part Number: GS9000B

 

MFG: GENNUM

Package Cooled: PLCC

D/C: 05+

 

 

 
 
 
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About GS9000C

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Datasheet: GS9000C

File Size: 109121 KB

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  • GS9004B

  • D/C: 97+& Qty: 347  Adddate: 2024-12-19
  • Inquire Now
  • Moko Technology Limited   China
    Contact: Mr.Tom   MSN:tom-ic@hotmail.com
    Tel: 0086-0755-23956700
    Fax: 0086-0755-23956710
    (22)

About GS9000C

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Datasheet: GS9000C

File Size: 109121 KB

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GS9000D Suppliers

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  • GS9004B

  • D/C: 97+& Qty: 347  Adddate: 2024-12-19
  • Inquire Now
  • Moko Technology Limited   China
    Contact: Mr.Tom   MSN:tom-ic@hotmail.com
    Tel: 0086-0755-23956700
    Fax: 0086-0755-23956710
    (22)

About GS9000C

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Datasheet: GS9000C

File Size: 109121 KB

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GS9000C General Description


The GS9000C is a CMOS integrated circuit specifically designed to deserialize SMPTE 259M serial digital signals at data rates to 370Mb/s.

The device incorporates a descrambler, serial to parallel convertor, sync processing unit, sync warning unit and automatic standards select circuitry.

Differential pseudo-ECL inputs for both serial clock and data are internally level shifted to CMOS levels. Digital outputs such as parallel data, parallel clock, HSYNC, Sync Warning and Standard Select are all TTL compatible.

The GS9000C is designed to directly interface with the GS9005A Reclocking Receiver to form a complete SMPTE-serial-in to CMOS level parallel-out deserializer. The GS9000C may also be used with the GS9010A and the GS9005A to form an adjustment-free receiving system which automatically adapts to all serial digital data rates. The GS9015A can replace the GS9005A in GS9000C applications where cable equalization is not required.

The GS9000C is packaged in a 28 pin PLCC and operates from a single 5 volt, ±5% power supply.


GS9000D General Description


The GS9000D is a CMOS integrated circuit specifically designed to deserialize SMPTE 259M serial digital signals at data rates up to 270Mb/s. The GS9000D is a pin and functional equivalent to the GS9000C, with the exception of SDI input levels which are compatible for direct interfacing to the GS7025, GS9025A and GS9035A.

The device incorporates a descrambler, serial to parallel convertor, sync processing unit, sync warning unit and automatic standards select circuitry.

Differential pseudo-ECL inputs for both serial clock and data are internally level shifted to CMOS levels. Digital outputs such as parallel data, parallel clock, HSYNC, Sync Warning and Standard Select are all TTL compatible.

The GS9000D is packaged in a 28 pin PLCC and operates from a single 5 volt, ±5% power supply.

GS9000D Maximum Ratings

PARAMETER
VALUE
Supply Voltage (VS = VDD - VSS)
Input Voltage Range (any input)
DC Input Current (any one input)
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 seconds)
7V
-0.3 to (VDD + 0.3)
±10A
0 to 70
-65 to +15
260

GS9000D Features

• fully compatible with SMPTE 259M-ABC
• decodes 8 and 10 bit serial digital signals for data rates to 270Mb/s
• recommended alternative to GS9000C for use when interfacing directly to GS7025, GS9025A or GS9035A
• incorporates automatic standards selection
• 325mW power dissipation at 270MHz clock rate
• Pb-free and Green
• operates from single +5 or -5 volt supply
• 28 pin PLCC packaging

GS9000D Typical Application

• 4ƒSC and 4:2:2 serial digital interfaces
• Automatic standards select controller for serial routing and distribution applications

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