DS31612A1, DS3163, DS3163A2 Selling Leads, Datasheet
MFG:DS Package Cooled:BGA D/C:2006
DS31612A1, DS3163, DS3163A2 Datasheet download
Part Number: DS31612A1
MFG: DS
Package Cooled: BGA
D/C: 2006
DS31612A1, DS3163, DS3163A2
- Table of contents:
Info of DS31612A1
Info of DS3163
Info of DS3163A2
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About DS3
PDF/DataSheet Download
Datasheet: DS3
File Size: 68288 KB
Manufacturer: Linear
Download : Click here to Download
About DS3163
PDF/DataSheet Download
Datasheet: DS3163
File Size: 368640 KB
Manufacturer: MAXIM
Download : Click here to Download
About DS3
PDF/DataSheet Download
Datasheet: DS3
File Size: 68288 KB
Manufacturer: Linear
Download : Click here to Download
DS3163 General Description
The DS3161, DS3162, DS3163, and DS3164 (DS316x) integrate ATM cell/HDLC packet processor(s) with DS3/E3 framer(s) to map/demap ATM cells or packets into as many as four DS3/E3 digital lines with DS3-framed, E3-framed, or clearchannel data streams on per-port basis.
DS3163 Maximum Ratings
Voltage Range on Any Input, Bidirectional or Open Drain
Output Lead Range with Respect to VSS........-0.3V to +5.5V
Supply Voltage (VDD) Range with Respect to VSS...-0.3V to +3.63V
Ambient Operating Temperature Range ........-40 to +85
Junction Operating Temperature Range........-40 to +125
Storage Temperature Range .............-55 to +125
Soldering Temperature Range.See IPC/JEDEC J-STD-020 Specification.
These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time can affect device reliability. Ambient Operating Temperature Range is assuming the device is mounted on a JEDEC standard test board in a convection cooled JEDEC test enclosure.
Note: The typical values listed below are not production tested.
Output Lead Range with Respect to VSS........-0.3V to +5.5V
Supply Voltage (VDD) Range with Respect to VSS...-0.3V to +3.63V
Ambient Operating Temperature Range ........-40 to +85
Junction Operating Temperature Range........-40 to +125
Storage Temperature Range .............-55 to +125
Soldering Temperature Range.See IPC/JEDEC J-STD-020 Specification.
These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time can affect device reliability. Ambient Operating Temperature Range is assuming the device is mounted on a JEDEC standard test board in a convection cooled JEDEC test enclosure.
Note: The typical values listed below are not production tested.
DS3163 Features
·Single (DS3161), Dual (DS3162), Triple (DS3163), or Quad (DS3164) ATM/Packet PHYs for DS3, E3, and Clear-Channel 52Mbps (CC52)
·Pin Compatible for Ease of Port Density Migration in the Same PC Board Platform
·Each Port Independently Configurable
·Universal PHYs Map ATM Cells and/or HDLC Packets into DS3 or E3 Data Streams
·UTOPIA L2/L3 or POS-PHY™ L2/L3 or SPI-3 Interface with 8-, 16-, or 32-Bit Bus Width
·66MHz UTOPIA L3 and POS-PHY L3 Clock
·52MHz UTOPIA L2 and POS-PHY L2 Clock
·Ports Independently Configurable for Cell or Packet Traffic in POS-PHY Bus Modes
·Direct, PLCP, DSS, and Clear-Channel Cell Mapping
·Direct and Clear-Channel Packet Mapping
·On-Chip DS3 (M23 or C-Bit) and E3 (G.751 or G.832) Framer(s)
·Ports Independently Configurable for DS3, E3 (Full or Subrate) or Arbitrary Framing Protocols Up to 52Mbps
·Programmable (Externally Controlled or Internally Finite State Machine Controlled) Subrate DS3/E3
·Pin Compatible for Ease of Port Density Migration in the Same PC Board Platform
·Each Port Independently Configurable
·Universal PHYs Map ATM Cells and/or HDLC Packets into DS3 or E3 Data Streams
·UTOPIA L2/L3 or POS-PHY™ L2/L3 or SPI-3 Interface with 8-, 16-, or 32-Bit Bus Width
·66MHz UTOPIA L3 and POS-PHY L3 Clock
·52MHz UTOPIA L2 and POS-PHY L2 Clock
·Ports Independently Configurable for Cell or Packet Traffic in POS-PHY Bus Modes
·Direct, PLCP, DSS, and Clear-Channel Cell Mapping
·Direct and Clear-Channel Packet Mapping
·On-Chip DS3 (M23 or C-Bit) and E3 (G.751 or G.832) Framer(s)
·Ports Independently Configurable for DS3, E3 (Full or Subrate) or Arbitrary Framing Protocols Up to 52Mbps
·Programmable (Externally Controlled or Internally Finite State Machine Controlled) Subrate DS3/E3
DS3163 Typical Application
·Access Concentrators Multiservice Access
·Platform (MSAP)
·SONET/SDH ADM
·SONET/SDH Muxes Multiservice Protocol
·PBXs
·Platform (MSPP)
·Digital Cross Connect ATM and Frame Relay
·Test Equipment Equipment
·Routers and Switches PDH Multiplexer/
·Integrated Access Demultiplexer
·Device (IAD)
·Platform (MSAP)
·SONET/SDH ADM
·SONET/SDH Muxes Multiservice Protocol
·PBXs
·Platform (MSPP)
·Digital Cross Connect ATM and Frame Relay
·Test Equipment Equipment
·Routers and Switches PDH Multiplexer/
·Integrated Access Demultiplexer
·Device (IAD)
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