Circuit Diagram

15__to_5_V_converter_with_800_μA_output

Published:2009/7/24 3:50:00 Author:Jessie

This circuit converts a single 1.5-V cell to a 5-V output with only 125 μA of quiescent current. Figure 8-47B shows a plot of output current versus input voltage. The optional connection (shown in dashed lines) uses the floating secondary of the transformer to produce a -5-V output.   (View)

View full Circuit Diagram | Comments | Reading(773)

GCS_HORIZONTAL_SWEEP

Published:2009/7/24 3:50:00 Author:Jessie

Uses gate-controlled switch GCS to replace horizontal output lube in television receiver, and semiconductor diode D1 to replace damper. GCS can cut off 2.5-amp peak current in 500 nsec.-J. W. Motto, Jr. GCS Sweep Circuit, EEE, 12:5, p 89-90.   (View)

View full Circuit Diagram | Comments | Reading(1016)

VARIABLE_BOOTSTRAP_FLIP_FLOP_SWEEP

Published:2009/7/24 3:49:00 Author:Jessie

Gives same type of waveform as phontastron. Output pulse length can be varied by d-c bitts or by control voltage.-J. B. Payne III, Voltage-Controlled Bootstrap Generator, Electronics, 33:11, p 177-178.   (View)

View full Circuit Diagram | Comments | Reading(692)

Correction_for_minimum_quiescent_current_near_dropout

Published:2009/7/24 3:48:00 Author:Jessie

Figure 8-8 shows how the quiescent current or the MAX667 (Figs. 8-5, 8-6) can be further reduced near the dropout voltage (compared to the circuit of Fig. 8-7). MAXIM NEW RELEASES DATA Book, 1992, P. 4-138.   (View)

View full Circuit Diagram | Comments | Reading(537)

READY，SET，GO！

Published:2009/7/1 4:21:00 Author:May

Circuit NotesThis game tests a player's reaction time.It is activated by closing switch S1, which starts the tone generator and arms the circuit.The touchplate, labeled PLAY in the diagram, consists of two metal strips about 1/16th-inch apart. The first player to bridge the gap with his or her finger turns off the tone and lights the associated LED indicator. A second touchplate, labeled CLR in the diagram, clears the circuit, extinguishing the LED, when its gap is bridged by a fingertip.   (View)

View full Circuit Diagram | Comments | Reading(1291)

CRYSTAL_MONO_USING_INVERTERS

Published:2009/7/1 4:20:00 Author:May

Uses all three sections of CD4049 triple inverter.with series-resonant crystal connection.supply can be in range of 3 to 15V. Serves as compact Iow-power portable RF oscillator having low battery drain.-W. J. Prudhomme, CMOS Oscillators. 73 Magazine. July 1977. p 60-63.   (View)

View full Circuit Diagram | Comments | Reading(486)

SPEECH_COMPRESSOR

Published:2009/7/1 4:20:00 Author:May

The amplifier drives the base of a pnp MPS6517 operating common-emitter with a voltage gain of approximately 20. The control RI varies the quiescent Q point of this transistor so that varying amounts of signal exceed the level Vr. Diode Dl rectifies the positive peaks of Q1's output only when these peaks are greater than Vr ≈ 7.0 volts. The resulting output is filtered Cx, Rx. Rx controls the charging time constant or attack time. Cx is involved in both charge and discharge. R2 (150 K, input resistance of the emitter-follower Q2) controls the decay time. Making the decay long and attack short is accomplished by making Rx small and R2 large, (A Darlington emitter-follower may be needed if extremely slow decay times are required.) The emitter-follower Q2 drives the AGC Pin 2 of the MC1590 and reduces the gain. R3 controls the slope of signal compression.   (View)

View full Circuit Diagram | Comments | Reading(986)

STANDBY_GENERATOR_FREQUENCY_METER

Published:2009/7/1 4:19:00 Author:May

Developed for use with 10-60 VAC generator driven by Iawn mower engine， as guide for adjusting speed manually to give correct power-line frequency. Output of altemator， connected to A and B，is converted to regulated 10VDC by R1， D1， D2， and C2. Same input voltage is squared by Tr1 and fed to Tr 2through differentiating circuit. Current pulses developed in collector circuit of Tr2 have constant width and varying repetition rate depending on input frequency. Inertia of meter movement provides integration required to give steady reading that changes only with input frequency. Meter scale is calibrated from 0 to 100 Hz，with R6 adjusted to give correct reading when 10-60 VAC Iine voltage is applied to input. Power transformer must be used to boost output of alternator to correct AC Iine voltage.-J. M. Caunter，Low-Cost Emergency Power Generator, Wlireless World， Feb. 1975，p 75-77.   (View)

View full Circuit Diagram | Comments | Reading(875)

BAR_GRAPH_DRIVE

Published:2009/7/1 4:18:00 Author:May

Use of National LM339 quad comparator minimizes number of components needed to drive Burroughs 200-seg-ment gas-discharge bar display. Every third electrode of display is tied together, so only three Iines (phase 1, 2, and 3) control all segments. When phase Iines are driven by consecutive pulses, glow of gas-discharge element is propagated continuously along alray. Anode voltage is gated so number of glowing segments is proportional to analog input. Compar-ators A1 and A2 generate gated anode signals with durations proportional to inputs. A3 compares ramp signal to 2-V reference and generates end-of-scan signal when ramp exceeds reference. A4 generates dock having period of about 60 μ s.-S. N. Kim, Driving Bunoughs' Bar Graph Display, National Semiconductor, Santa Clara, CA, 1975, DB-4.   (View)

View full Circuit Diagram | Comments | Reading(591)

LOW_DISTORTION_AUDIO_LIMITER

Published:2009/7/1 4:17:00 Author:May

The level at which the audio limiter comes into action can be set with the LIMIT LEVEL trimmer potentiometer. When that level is exceeded, the output from the LIMITER-DETECTOR half of the op-amp (used as a comparator) turns the LED which causes the resistance of the photoresistor to decrease rapidly. That in turn causes the gain of the LIMITER half of the op-amp to decrease. When the signal drops below the desired limiting level, the LED turns off, the resistance of the photoresistor increases, and the gain of the LIMITER op-amp returns to its normal level-that set by the combination of resistors RI and R2. A dual-polarity power supply (±) 12 volts is desirable) is needed for the op-amp.   (View)

View full Circuit Diagram | Comments | Reading(1859)

THERMOCOUPLE_AMPLIFIER

Published:2009/7/1 4:15:00 Author:May

The circuit uses a CA3193 BiMOS precision op amp to amplify the generated signal 500 times. Three 22-megohm resistors will provide full-scale output if the thermocouple opens.   (View)

View full Circuit Diagram | Comments | Reading(0)

FLUORESCENT_DISPLAY_DRIVER

Published:2009/7/1 4:15:00 Author:May

National DS8881 vacuum fluorescent display driver handles 16-digit grids. Decode inputs select 1 of 16 outputs to be pulled high. Driver also contains oscillator for supplying clock signals to MOS circuit, filament-bias zener, and 50K pulldown resistors for each grid. Outputs will source up to 7 mA. Supply is 9 V. Interdigh blanking with enable input provides ghost-free display.- In-terface Databook, National Semiconductor, Santa Clara, CA, 1978, p 5-57-5-60.   (View)

View full Circuit Diagram | Comments | Reading(712)

CHAINED_ASTABLES

Published:2009/7/1 4:15:00 Author:May

Gross-connected 322 mono MVBRs. operating as astables、are interconnected so individual timing periods are generated in sequence as shown.Total period T is sum of three individual periods, after which cycle repeats itseff. Chain may be extended further if desired. Useful when prescribed sequence of timing events is required. Equations glve values of R and C for timing periods ranging from 10 μS to several minutes－W G .Jung、 IC Timer Cookbook. Howard W，Sams.Indanaplis.IN.1977.p125－128.   (View)

View full Circuit Diagram | Comments | Reading(520)

TWO_WIRE_TO_FOUR_WIRE_AUDIO_CONVERTER

Published:2009/7/1 4:15:00 Author:May

This converter circuit maintains 40 dB of isolation between the input and output halves of a four-wire line while permitting a two-wire line to be connected. A balancing potentiometer, Rg, adjusts the gain of IC2 to null the feed-through from the input to the output. The adjustment is done on the workbench just after assembly by inserting a 1 kHz tone into the four-wire input and setting Rg for minimum output signal. An 82 ohm dummy-load resistor is placed across the two wire terminals.   (View)

View full Circuit Diagram | Comments | Reading(590)

Hl_Fl_COMPANDER

Published:2009/7/1 4:13:00 Author:May

This circuit for a high fidelity compressor uses an external op amp, and has a high gain and wide bandwidth. An input compensation network is required for stability. The rectifier capacitor (C9) is not grounded, but is tied to the output of an op amp circuit. When a compressor is operating at high gain, (small input signal), and is suddenly hit with a signal, it will overload until it can reduce its gain. The time it takes for the compressor to recover from overload is deter-mined by the rectifier capacitor C9. The expandor to complement the compressor is shown in Fig. 2-13B. Here an external op amp is used for high slew rate. Both the compressor and expandor have unity gain levels of 0 dB. Trim networks are shown for distortion (THD) and dc shift. The distortion trim should be done first, with an input of 0 dB at 10 kHz. The dc shift should be adjusted for minimum envelope bounce with tone bursts.   (View)

View full Circuit Diagram | Comments | Reading(2318)

FUZZ_BOX_2

Published:2009/7/1 4:13:00 Author:May

Circuit Notes Potentiometer R3 sets the degree of fuzz, and R8 sets the output level. Since the fuzz effect cannot be completely eliminated by R3, fuzz-free sound requires a bypass switch from the input to output terminals.   (View)

View full Circuit Diagram | Comments | Reading(653)

PICO_AMMETER

Published:2009/7/1 4:12:00 Author:May

Care must be taken to eliminate any stray currents from flowing into the current summing node. This can be accomplished by forcing all points surrounding the input to the same potential as the input. In this case the potential of the input is at virtual ground, or OV. Therefore, the case of the device is grounded to intercept any stray leakage currents that may otherwise exist between the ±15 V input terminals and the inverting input summing junctions. Feedback capacitance should be kept to a minimum in order to maximize the response time of the circuit to step function input currents. The time constant of the circuit is approximately the produce of the feedback capacitance Cfb times the feedback resistor Rfb, For instance, the time constant of the circuit is 1 sec if Cfb= 1pF. Thus, it takes approximately 5 sec (5 time constants) for the circuit to stabilize to within 1% of its final output voltage after a step function of input current has been applied. Cfb of less than 0.2 to 0.3 pF can be achieved with proper circuit layout.   (View)

View full Circuit Diagram | Comments | Reading(0)

FUZZ_BOX_1

Published:2009/7/1 4:11:00 Author:May

Circuit NotesThe input signal is amplified by the transistors. The distorted output is then clipped by the two diodes and the high frequency noise is filtered from the circuit via the 500 pF capacitor. The 1 M pot adjusts the intensity of fuzz frog maximum to no fuzz (normal the playing).   (View)

View full Circuit Diagram | Comments | Reading(778)

CURRENT_COLLECTOR_HEAD_AMPLIFIER

Published:2009/7/1 4:11:00 Author:May

To amplify small current signals such as from an electron,collector inside a vacuum chamber, it is convenient for reasons of noise and bandwidth to have a head-amplifter attached to the chamber. The op-amp N1 is a precision bipolar device with extremely low bias current and offset voltage (1) as well as low noise, which allows the 100:1 feedback attenuator to be employed. The resistance of R3 can be varied from above 10 M to below 1 k, and so the nominal 0 to 1 V-peak output signal corresponds to input current ranges oflnAto10μA.   (View)

View full Circuit Diagram | Comments | Reading(0)

LINEAR_AMPLIFIERS_FROM_CMOS_INVERTERS

Published:2009/7/1 4:09:00 Author:May

CMOS inverters can be used as linear amplifiers if negative feedback is applied. Best linearity is obtained with feedback applied around three inverters which gives almost perfect linearity up to an output swing of 5 V p-p with a 10 V supply rail. The gain is set by the ratio of R1 and R2 and the values shown are typical for a gain of 100. The high frequency response with the values shown is almost flat to 20 kHz. The frequency response is determined by C1 and C2. This circuit is not suitable for low level signals because the signal-to-noise ratio is only approx. 50 dB with 5 V p-p output with the values shown.   (View)

View full Circuit Diagram | Comments | Reading(584)

Pages:1183/2234 At 2011811182118311841185118611871188118911901191119211931194119511961197119811991200Under 20