ZL50012QC, ZL50012QCC, ZL50012QCG1 Selling Leads, Datasheet
MFG:ZARLINK Package Cooled:TQFP D/C:2009
ZL50012QC, ZL50012QCC, ZL50012QCG1 Datasheet download
Part Number: ZL50012QC
MFG: ZARLINK
Package Cooled: TQFP
D/C: 2009
ZL50012QC, ZL50012QCC, ZL50012QCG1
- Table of contents:
Info of ZL50012QC
Info of ZL50012QCC
Info of ZL50012QCG1
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About ZL50010
PDF/DataSheet Download
Datasheet: ZL50010
File Size: 736327 KB
Manufacturer: ZARLINK [Zarlink Semiconductor Inc]
Download : Click here to Download
About ZL50010
PDF/DataSheet Download
Datasheet: ZL50010
File Size: 736327 KB
Manufacturer: ZARLINK [Zarlink Semiconductor Inc]
Download : Click here to Download
About ZL50010
PDF/DataSheet Download
Datasheet: ZL50010
File Size: 736327 KB
Manufacturer: ZARLINK [Zarlink Semiconductor Inc]
Download : Click here to Download
ZL50012QCG1 General Description
The device has sixteen ST-BUS inputs (STi0-15) and sixteen ST-BUS outputs (STo0-15). It is a non-blocking digital switch with 512 64 kb/s channels and performs rate conversion between the ST-BUS inputs and ST-BUS outputs. The ST-BUS inputs accept serial input data streams with the data rate of 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s on a per-stream basis. The ST-BUS outputs deliver serial output data streams with the data rate of 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s on a per-stream basis. The device also provides sixteen high impedance control outputs (STOHZ 0-15) to support the use of external high impedance control buffers.
The ZL50012 has features that are programmable on per-stream or per-channel basis including message mode, input bit delay, output bit advancement, constant throughput delay and high impedance output control.
ZL50012QCG1 Maximum Ratings
|
Parameter |
Symbol |
Min. |
Max |
Units | |
|
1 |
I/O Supply Voltage |
VDD |
-0.5 |
5.0 |
V |
|
2 |
Input Voltage |
VI_3V |
-0.5 |
VDD + 0.5 |
V |
|
3 |
Input Voltage (5 V tolerant inputs) |
VI_5V |
-0.5 |
7.0 |
V |
|
4 |
Continuous Current at digital outputs |
IO |
|
15 |
mA |
|
5 |
Package power dissipation |
PD |
|
0.75 |
W |
|
6 |
Storage temperature |
TS |
-0.5 |
+125 |
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
ZL50012QCG1 Features
• 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation
• Rate conversion between the ST-BUS inputs and ST-BUS outputs
• Per-stream ST-BUS input with data rate selection of 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s
• Per-stream ST-BUS output with data rate selection of 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s; the output data rate can be different than the input data rate
• Per-stream high impedance control output for every ST-BUS output with fractional bit advancement
• Per-stream input channel and input bit delay programming with fractional bit delay
• Per-stream output channel and output bit delay programming with fractional bit advancement
• Multiple frame pulse outputs and reference clock outputs
• Per-channel constant throughput delay
• Per-channel high impedance output control
• Per-channel message mode
• Per-channel pseudo random bit sequence (PRBS) pattern generation and bit error detection
• Control interface compatible to Motorola nonmultiplexed CPUs
• Connection memory block programming capability
• IEEE-1149.1 (JTAG) test port
• 3.3V I/O with 5 V tolerant input
ZL50012QCG1 Typical Application
• Small and medium digital switching platforms
• Access Servers
• Time Division Multiplexers
• Computer Telephony Integration
• Digital Loop Carriers
• Access Servers
• Time Division Multiplexers
• Computer Telephony Integration
• Digital Loop Carriers
ZL50012QCG1 Connection Diagram
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