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The uPSD323x Series combines a fast 8051- based microcontroller with a flexible memory structure, programmable logic, and a rich peripheral mix including USB, to form an ideal embedded controller. At its core is an industry-standard 8032 MCU operating up to 40MHz.
A JTAG serial interface is used for In-System Programming (ISP) in as little as 10 seconds, perfect for manufacturing and lab development.
The USB 1.1 low-speed interface has one Control endpoint and two Interrupt endpoints suitable for HID class drivers.
The 8032 core is coupled to Programmable System Device (PSD) architecture to optimize the 8032 memory structure, offering two independent banks of Flash memory that can be placed at virtually any address within 8032 program or data address space, and easily paged beyond 64K bytes using on-chip programmable decode logic.
Dual Flash memory banks provide a robust solution for remote product updates in the field through In-Application Programming (IAP). Dual Flash banks also support EEPROM emulation, eliminating the need for external EEPROM chips.
General purpose programmable logic (PLD) is included to build an endless variety of glue-logic, saving external logic devices. The PLD is configured using the software development tool, PSDsoft Express, available from the web at www.st.com/psm, at no charge.
The uPSD323x also includes supervisor functions such as a programmable watchdog timer and lowvoltage reset.
UPSD3234A Maximum Ratings
Symbol
Parameter
Min.
Max.
Unit
TSTG
Storage Temperature
65
125
°C
TLEAD
Lead Temperature during Soldering (20 seconds max.)(1)
235
°C
VIO
Input and Output Voltage (Q = VOH or Hi-Z)
0.5
6.5
V
VCC
Supply Voltage
0.5
6.5
V
VPP
Device Programmer Supply Voltage
0.5
14.0
V
VESD
Electrostatic Discharge Voltage (Human Body Model)(2)
FAST 8-BIT 8032 MCU 40MHz at 5.0V, 24MHz at 3.3V Core, 12-clocks per instruction DUAL FLASH MEMORIES WITH MEMORY MANAGEMENT Place either memory into 8032 program address space or data address space READ-while-WRITE operation for In- Application Programming and EEPROM emulation Single voltage program and erase 100K minimum erase cycles, 15-year retention CLOCK, RESET, AND SUPPLY MANAGEMENT SRAM is Battery Backup capable Normal, Idle, and Power Down Modes Power-on and Low Voltage reset supervisor Programmable Watchdog Timer PROGRAMMABLE LOGIC, GENERAL PURPOSE 16 macrocells Implements state machines, glue-logic, and so forth COMMUNICATION INTERFACES USB v1.1, low-speed 1.5Mbps, 3 endpoints I2C Master/Slave bus controller Two UARTs with independent baud rate Six I/O ports with up to 46 I/O pins 8032 Address/Data bus available on TQFP80 package 5 PWM outputs, 8-bit resolution JTAG IN-SYSTEM PROGRAMMING Program the entire device in as little as 10 seconds Figure 1. Packages A/D CONVERTER Four channels, 8-bit resolution, 10s TIMERS AND INTERRUPTS Three 8032 standard 16-bit timers 10 Interrupt sources with two external interrupt pins Single Supply Voltage 4.5 to 5.5V 3.0 to 3.6V