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SN74LVCH16543ADL, SN74LVCH16543AGQLR, SN74LVCH16646A

Table of contents:
Info of SN74LVCH16543ADL
Info of SN74LVCH16543AGQLR
Info of SN74LVCH16646A

SN74LVCH16543ADL, SN74LVCH16543AGQLR, SN74LVCH16646A Selling Leads, Datasheet

MFG:Texas Instruments (VA) Category:Integrated Circuits (ICs) Package Cooled:SSOP56 D/C:07+PB

SN74LVCH16543ADL, SN74LVCH16543AGQLR, SN74LVCH16646A Datasheet download

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Part Number: SN74LVCH16543ADL

Category: Integrated Circuits (ICs)

MFG: Texas Instruments (VA)

Package Cooled: SSOP56

D/C: 07+PB

Description: IC REGISTERED TRANSCVR 56BGA

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SN74LVCH16543ADL Parameters

Technical/Catalog Information	SN74LVCH16543ADL
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Logic Type	Registered Transceiver, Non-Inverting
Package / Case	56-SSOP
Packaging	Tube
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	2 - Dual
Operating Temperature	-40°C ~ 85°C
Voltage - Supply	1.65 V ~ 3.6 V
Current - Output High, Low	24mA, 24mA
Drawing Number	296; 4040048; DL; 28, 48, 56
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	SN74LVCH16543ADL SN74LVCH16543ADL 296 8598 5 ND 29685985ND 296-8598-5

SN74LVCH16543AGQLR Parameters

Technical/Catalog Information	SN74LVCH16543AGQLR
Vendor	Texas Instruments (VA)
Category	Integrated Circuits (ICs)
Logic Type	Registered Transceiver, Non-Inverting
Package / Case	56-BGA MICROSTAR JUNIOR
Packaging	Digi-Reel?
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	2 - Dual
Operating Temperature	-40°C ~ 85°C
Voltage - Supply	1.65 V ~ 3.6 V
Current - Output High, Low	24mA, 24mA
Drawing Number	296; 4200583-3; GQL; 56
Lead Free Status	Contains Lead
RoHS Status	RoHS Non-Compliant
Other Names	SN74LVCH16543AGQLR SN74LVCH16543AGQLR 296 13287 6 ND 296132876ND 296-13287-6

SN74LVCH16646A General Description

This 16-bit bus transceiver and register is designed for 1.65-V to 3.6-V V_CC operation.The SN74LVCH16646A can be used as two 8-bit
transceivers or one 16-bit transceiver. The device consists of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.

Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the SN74LVCH16646A.

Output-enable (OE ) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high), A data can be stored in one register and/or B data can be stored in the other register.

SN74LVCH16646A Maximum Ratings

Supply voltage range, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .VCC 0.5 V to 6.5 V
Input voltage range, V_I:(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance or power-off state, V_O
                                      (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, V_O
                                    (see Notes 1 and 2) . . . . . . . . . . . . . . . .0.5 V to VCC + 0.5 V

Input clamp current, I_IK (V_I < 0) . . . . . . . . . . . . . . . . . . .. . . . . . . . . .  . . . . . . . .50 mA
Output clamp current, I_OK (V_O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . .50 mA
Continuous output current, I_O. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . .±50 mA
Continuous current through each VCC or GND. . . . . . . . . . . . . . . . . . . . . . . . .. ±100 mA
Package thermal impedance, _JA (see Note 3):DGG package . . . . . . . . . . . . . . .81°C/W
                                                                          DL package . . . . . . . . . . . . . . . .74°C/W
Storage temperature range, T_STG. . . . . . . . . . . . . . . . . . . . . . . ..  . . .65°C to 150°C

SN74LVCH16646A Features

Member of the Texas Instruments
    Widebus™ Family
EPIC ™(Enhanced-Performance Implanted
    CMOS) Submicron Process
Typical VOLP (Output Ground Bounce)
    < 0.8 V at V_CC= 3.3 V, T_A = 25°C
Typical VOHV (Output VOH Undershoot)
    > 2 V at V_CC = 3.3 V, T_A = 25°C
Supports Mixed-Mode Signal Operation on
    All Ports (5-V Input/Output Voltage With
    3.3-V V_CC)
Power Off Disables Outputs, Permitting
    Live Insertion
ESD Protection Exceeds 2000 V Per
    MIL-STD-883, Method 3015; Exceeds 200 V
    Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per
    JESD 17
Bus Hold on Data Inputs Eliminates the
    Need for External Pullup/Pulldown
    Resistors
Package Options Include Plastic 300-mil
    Shrink Small-Outline (DL) and Thin Shrink
    Small-Outline (DGG) Packages

SN74LVCH16646A Connection Diagram

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