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SN74LV161A, SN74LV161AD, SN74LV161ADB

Table of contents:
Info of SN74LV161A
Info of SN74LV161AD
Info of SN74LV161ADB

SN74LV161A, SN74LV161AD, SN74LV161ADB Selling Leads, Datasheet

MFG:Texas Instruments Category:Integrated Circuits (ICs) Package Cooled:TSSOP14 D/C:08+

SN74LV161A, SN74LV161AD, SN74LV161ADB Datasheet download

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Part Number: SN74LV161AD

Category: Integrated Circuits (ICs)

MFG: Texas Instruments

Package Cooled: TSSOP14

D/C: 08+

Description: IC 4BIT SYNC BINRY COUNTR 16SOIC

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SN74LV161A General Description

The 'LV161A devices are 4-bit synchronous binary counters designed for 2-V to 5.5-V VCC operation. These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes that normally are associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform.

These counters are fully programmable; that is, they can be preset to any number between 0 and 9 or 15. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs. The clear function for the 'LV161A devices is asynchronous. A low level at the clear (CLR) input sets all four of the flip-flop outputs low, regardless of the levels of the CLK, load (LOAD), or enable inputs. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are ENP, ENT, and a ripple-carry output (RCO). Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. Enabling RCO produces a high-level pulse while the count is maximum (9 or 15 with QA high). This high-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the level of CLK.

These counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times. The SN54LV161A is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74LV161A is characterized for operation from 40°C to 85°C.

SN74LV161A Maximum Ratings

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Input voltage range, V_I (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, V_O (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Output voltage range applied in the high or low state, VO (see Notes 1 and 2) . . . . . . .0.5 V to _VCC + 0.5 V
Input clamp current, I_IK (V_I < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Output clamp current, IOK (V_O < 0 or V_O > V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±50 mA
Continuous output current, I_O (V_O = 0 to V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V_CC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, qJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73°C/W
                                                                          DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
                                                                          DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120°C/W
                                                                          N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
                                                                          PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .08°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.

SN74LV161A Connection Diagram

SN74LV161AD Parameters

Technical/Catalog Information	SN74LV161AD
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Logic Type	Binary Counter
Trigger Type	Positive Edge
Voltage - Supply	2 V ~ 5.5 V
Number of Bits per Element	4
Number of Elements	1 - Single
Direction	Up
Mounting Type	Surface Mount
Package / Case	16-SOIC (3.9mm Width)
Reset	Asynchronous
Packaging	Tube
Operating Temperature	-40°C ~ 85°C
Count Rate	95MHz
Timing	Synchronous
Drawing Number	296; 4040047-4; D; 16
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	SN74LV161AD SN74LV161AD

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