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SN74ALVCH16334DLR, SN74ALVCH16344, SN74ALVCH16373

Table of contents:
Info of SN74ALVCH16334DLR
Info of SN74ALVCH16344
Info of SN74ALVCH16373

SN74ALVCH16334DLR, SN74ALVCH16344, SN74ALVCH16373 Selling Leads, Datasheet

MFG:Texas Instruments Category:Integrated Circuits (ICs) Package Cooled:SSOP48 D/C:09+

SN74ALVCH16334DLR, SN74ALVCH16344, SN74ALVCH16373 Datasheet download

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Part Number: SN74ALVCH16334DLR

Category: Integrated Circuits (ICs)

MFG: Texas Instruments

Package Cooled: SSOP48

D/C: 09+

Description: IC UNIV BUS DVR 16BIT 48SSOP

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SN74ALVCH16334DLR Parameters

Technical/Catalog Information	SN74ALVCH16334DLR
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Number of Circuits	16-Bit
Package / Case	48-SSOP
Logic Type	Universal Bus Driver
Packaging	Tape & Reel (TR)
Mounting Type	Surface Mount
Number of Inputs	-
Current - Output High, Low	24mA, 24mA
Supply Voltage	1.65 V ~ 3.6 V
Operating Temperature	-40°C ~ 85°C
Voltage - Supply	1.65 V ~ 3.6 V
Drawing Number	296; 4040048; DL; 28, 48, 56
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	SN74ALVCH16334DLR SN74ALVCH16334DLR

SN74ALVCH16344 General Description

      This 1-bit to 4-bit address driver is designed for 1.65-V to 3.6-V V_CC operation.

      The SN74ALVCH16344 is used in applications in which four separate memory locations must be addressed by a single address.

      To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

      Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.

      The SN74ALVCH16344 is characterized for operation from 40°C to 85°C.

SN74ALVCH16344 Maximum Ratings

Supply voltage range,   V_CC. . . . . . . . . .. . . . . .. . . . . . . . . . . . . -0.5 V to 4.6V
Input voltage range, V_I(see Note 1). . . . . . . . . .. . . ... . -0.5 V to V_CC + 4.6 V
Onput voltage range, V_O(see Note 1 and 2). . . . . . . ... . -0.5 V to V_CC + 0.5 V
Input clamp current, I_IK (V_I < 0 ) .. . . . . . . . . .. . . . . .. . . . . .. . . . . . . .-50mA
Onput clamp current, I_OK (V_O < 0 ). . . .. . . . . .. . . . . .. . . . . .. . . . . . . . -50mA
Continuous output current,I_O .. . . . . .. . . . . .. . . . . .. . . . . .. . . . ... . . ±50mA
Continuous current through V_CCor GND .. . . . . . . . . . . . .. . . . . .. . . .±100mA
Package thermal impedance, _JA(see Note 3): DGG package . . . .. . 81°C/W
                                                                          DGV package. . . . . .. 86°C/W
                                                                          DL package  . . . . . ...74°C/W
Storage temperature range, T_stg . . . . .  . . . . .  . . . . .  . . . 65°C to 150°C

SN74ALVCH16344 Features

*Member of the Texas Instruments Widebus™ Family
*EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
*Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
*Latch-Up Performance Exceeds 250 mA Per JESD 17
*Package Options Include Plastic 300-mil
Shrink Small-Outline (DL), Thin Shrink
Small-Outline (DGG), and Thin Very
Small-Outline (DGV) Packages

SN74ALVCH16344 Connection Diagram

SN74ALVCH16373 General Description

This 16-bit transparent D-type latch is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVCH16373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

SN74ALVCH16373 Maximum Ratings

Supply voltage range, V_CC   . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Input voltage range, V_I(see Note 1) . . . . . . . . . . . . . . . .. 0.5 V to 4.6 V
Output voltage range, V_O (see Notes 1 and 2) . .. 0.5 V to V_CC + 0.5 V
Input clamp current, I_IK (V_I < 0) . . . . . . . . . . . . . . . . . .......... . . . 50 mA
Output clamp current, I_OK (V_O < 0) . . . . . . . . . . . . . . . . . . . . .... 50 mA
Continuous output current, I_O   . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each V_CC or GND . . . . . . . . . . . .. . ±100 mA
Package thermal impedance, JA (see Note 3): DGG package .. . . 89°C/W
                                                                           DL package . .. . .. 94°C/W
Storage temperature range, T_stg 65. . . . . . . . . . . . . . . . . . . . C to 150 C

SN74ALVCH16373 Features

Member of the Texas Instruments Widebus(TM) Family
EPIC (TM) (Enhanced-Performance Implanted CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per
MIL-STD-833, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JESD 17
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

SN74ALVCH16373 Connection Diagram

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