S2103, S2104, S2106 Selling Leads, Datasheet
MFG:IOR Package Cooled:SMD-8 D/C:03 04
S2103, S2104, S2106
- Table of contents:
Info of S2103
Info of S2104
Info of S2106
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About S210
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Datasheet: S210
File Size: 48323 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
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About S2104
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Datasheet: S2104
File Size: 350289 KB
Manufacturer: Applied Micro Circuits Corporation
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About S210
PDF/DataSheet Download
Datasheet: S210
File Size: 48323 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
Download : Click here to Download
S2104 General Description
The S2104 facilitates high-speed serial transmission of data in a variety of applications including Fibre Channel, serial backplanes, and proprietary point to point links. The chip provides four separate transceivers which can be operated individually for a data capacity of >4 Gbps.
Each bi-directional channel provides parallel to serial and serial to parallel conversion, clock generation/ recovery, and framing. The on-chip transmit PLL synthesizes the high-speed clock from a low-speed reference. The on-chip quad receive PLL is used for clock recovery and data re-timing on the four independent data inputs. The transmitter and receiver each support differential PECL-compatible I/O for copper or fiber optic component interfaces with excellent signal integrity. Local loopback mode allows for system diagnostics. The chip requires a 3.3V power supply and dissipates 2.5 watts.
Figure 1 shows the S2104 and S2004 in a Fibre Channel application. Figure 2 combines the S2104 with a crosspoint switch to demonstrate a serial backplane application. Figure 3 is the input/output diagram. Figures 4 and 5 show the transmit and receive block diagrams, respectively.
S2104 Maximum Ratings
|
Parameter |
Min |
Typ |
Max |
Units |
| Storage Temperature |
-65 |
|
150 |
° C |
| Voltage on VDD with Respect to GND |
-0.5 |
|
+5.0 |
V |
| Voltage on any TTL Input Pin |
-0.5 |
|
3.47 |
V |
| Voltage on any PECL Input Pin |
0 |
|
VDD |
V |
| TTL Output Sink Current |
8 |
mA | ||
| TTL Output Source Current |
|
8 |
mA | |
| High Speed PECL Output Source Current |
25 |
mA | ||
| ESD Sensitivity 1 |
Over 500 VmA | |||
S2104 Features
• 1062 MHz (Fibre Channel) operating rate - 1/2 Rate Operation
• Quad Transmitter with phase-locked loop (PLL) clock synthesis from low speed reference
• ANSI x3T11 Fibre Channel Compatible
• Quad Receiver PLL provides clock and data recovery
• Internally series terminated TTL outputs
• Low-jitter serial PECL interface
• Individual local loopback control
• JTAG 1149.1 Boundary scan on low speed I/O signals
• Interfaces with coax, twinax, or fiber optics
• Single +3.3V supply, 2.5 W power dissipation
• Compact 23mm x 23mm 208 TBGA package
• Quad Transmitter with phase-locked loop (PLL) clock synthesis from low speed reference
• ANSI x3T11 Fibre Channel Compatible
• Quad Receiver PLL provides clock and data recovery
• Internally series terminated TTL outputs
• Low-jitter serial PECL interface
• Individual local loopback control
• JTAG 1149.1 Boundary scan on low speed I/O signals
• Interfaces with coax, twinax, or fiber optics
• Single +3.3V supply, 2.5 W power dissipation
• Compact 23mm x 23mm 208 TBGA package
S2104 Typical Application
• Workstation
• Frame buffer
• Switched networks
• Data broadcast environments
• Proprietary extended backplanes
• Frame buffer
• Switched networks
• Data broadcast environments
• Proprietary extended backplanes
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