RED5/6, RED5/6-S, RED50/60 Selling Leads, Datasheet
MFG:LSI Package Cooled:DIP-8 D/C:07+
RED5/6, RED5/6-S, RED50/60 Datasheet download
Part Number: RED5/6
MFG: LSI
Package Cooled: DIP-8
D/C: 07+
MFG:LSI Package Cooled:DIP-8 D/C:07+
RED5/6, RED5/6-S, RED50/60 Datasheet download
MFG: LSI
Package Cooled: DIP-8
D/C: 07+
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PDF/DataSheet Download
Datasheet: RED5/6
File Size: 99657 KB
Manufacturer:
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PDF/DataSheet Download
Datasheet: RED
File Size: 49001 KB
Manufacturer: LSI Computer Systems
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PDF/DataSheet Download
Datasheet: RED50/60
File Size: 38462 KB
Manufacturer:
Download : Click here to Download
The counter advances by one on each negative transition of the input clock pulse as long as the Enable signal is High and the Reset signal is Low. When the Enable signal is Low the input clock pulses will be inhibited and the counter will be held at the state it was in prior to bringing the Enable Low. A High Reset signal clears the counter to zero count.
Depending on the device used, a Low on the Division Select input will cause a Divide by 6, 60, 120, 360, 600 or 3600. A High on the Division Select will cause a Divide by 5, 50, 100, 300, 500 or 3000.