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MK2049-01, MK2049-01STR, MK2049-02

Table of contents:
Info of MK2049-01
Info of MK2049-01STR
Info of MK2049-02

MK2049-01, MK2049-01STR, MK2049-02 Selling Leads, Datasheet

MFG:MICROCLOCK Package Cooled:www.dayue-hk.com D/C:09+ ROHS

MK2049-01, MK2049-01STR, MK2049-02 Picture

MK2049-01, MK2049-01STR, MK2049-02 Datasheet download

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Part Number: MK2049-01

MFG: MICROCLOCK

Package Cooled: www.dayue-hk.com

D/C: 09+ ROHS

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MK2049-02 General Description

The MK2049-02 and MK2049-03 are Phase- Locked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clocks frequency-locked and phaselocked to an 8 kHz backplane clock, simplifying clock synchronization in communications systems. The MK2049-02/03 can also accept a T1, E1, T3, or E3 input clock and provide the same output for loop timing. All outputs are frequency-locked together and to the input.

These parts also have a jitter-attenuated buffer capability. In this mode, the MK2049-02/03 are ideal for filtering jitter from 27 MHz video clocks or other clocks with high jitter.

ICS/MicroClock can customize these devices for many other different frequencies. Contact your ICS/MicroClock representative for more details.

MK2049-02 Maximum Ratings

Parameter	Conditions	Minimum	Typical	Maximum	Units
Supply Voltage, VDD	Referenced to GND			7	V
Inputs Clock Outputs		-0.5		VDD+.5V	V
Ambient Operating Temperature	MK2049-0xS	0		70
Ambient Operating Temperature	MK2049-0xSI	-40		85
Soldering Temperature	Max of 10 seconds			250
Storage temperature		-65		150

MK2049-02 Features

• Packaged in 20 pin SOIC
• Fixed input-output phase relationship on most clock selections
• Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E
• Accept multiple inputs: 8 kHz backplane clock, Loop Timing frequencies, or 10-28 MHz
• Lock to 8 kHz ±100 ppm (External mode)
• Buffer Mode allows jitter attenuation of 1028 MHz input and x1/x0.5 or x2/x4 outputs
• Exact internal ratios enable zero ppm error
• Output clock rates include T1, E1, T3, E3, ISDN, xDSL, and OC3 submultiples
• 5 V ±5% operation. Refer to MK2049-34 for 3.3 V

MK2049-02 Connection Diagram

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