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K9F1G08U0A, K9F1G08U0A-JIB0, K9F1G08U0A-JIB0000

Table of contents:
Info of K9F1G08U0A
Info of K9F1G08U0A-JIB0
Info of K9F1G08U0A-JIB0000

K9F1G08U0A, K9F1G08U0A-JIB0, K9F1G08U0A-JIB0000 Selling Leads, Datasheet

MFG:580 Package Cooled:TSSOP D/C:04+

K9F1G08U0A, K9F1G08U0A-JIB0, K9F1G08U0A-JIB0000 Picture

K9F1G08U0A, K9F1G08U0A-JIB0, K9F1G08U0A-JIB0000 Datasheet download

Five Points

Part Number: K9F1G08U0A

MFG: 580

Package Cooled: TSSOP

D/C: 04+

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K9F1G08U0A General Description

Offered in 128Mx8bit the K9F1G08X0A is 1G bit with spare 32M bit capacity. Its NAND cell provides the most cost-effective solution for the solid state mass storage market. A program operation can be performed in typical 200µs on the 2112-byte page and an erase operation can be performed in typical 2ms on a 128K-byte block. Data in the data page can be read out at 30ns(50ns with 1.8V device) cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write controller automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data. Even the write-intensive systems can take advantage of the K9F1G08X0As extended reliability of 100K program/ erase cycles by providing ECC(Error Correcting Code)with real time mapping'out algorithm.The K9F1G08X0A is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable applications requiring non-volatility.

K9F1G08U0A Maximum Ratings

Parameter		Symbol	Rating		Unit
			1.8V DEVICE	3.3V DEVICE
Voltage on any pin relative to VSS		V_IN/OUT	0.6 to + 2.45	-0.6 to + 4.6	V
		V_CC	-0.2 to + 2.45	-0.6 to + 4.6
Temperature Under Bias	K9F1G08X0A-XCB0	T_BIAS	-10 to +125		°C
	K9F1G08X0A-XIB0		-40 to +125
Storage Temperature	K9F1G08X0A-XCB0	T_STG	-65 to +150		°C
	K9F1G08X0A-XIB0
Short Circuit Current		I_os	5		mA

K9F1G08U0A Features

• Voltage Supply
-1.8V device(K9F1G08R0A): 1.65V~1.95V
-3.3V device(K9F1G08U0A): 2.7 V ~3.6 V
• Organization
- Memory Cell Array : (128M + 4,096K)bit x 8bit
- Data Register : (2K + 64)bit x8bit
- Cache Register : (2K + 64)bit x8bit
• Automatic Program and Erase
- Page Program : (2K + 64)Byte
- Block Erase : (128K + 4K)Byte
• Page Read Operation
- Page Size : 2K-Byte
- Random Read : 25µs(Max.)
- Serial Access : 30ns(Min.) - 3.3v device
50ns(Min.) -1.8v device
• Fast Write Cycle Time
- Program time : 200µs(Typ.)
- Block Erase Time : 2ms(Typ.)
• Command/Address/Data Multiplexed I/O Port
• Hardware Data Protection
- Program/Erase Lockout During Power Transitions
• Reliable CMOS Floating-Gate Technology
- Endurance : 100K Program/Erase Cycles
- Data Retention : 10 Years
• Command Register Operation
• Cache Program Operation for High Performance Program
• Intelligent Copy-Back Operation
• Unique ID for Copyright Protection
• Package :
- K9F1G08U0A-YCB0/YIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9F1G08U0A-VIB0
48 - Pin WSOP I (12X17X0.7mm)
- K9F1G08U0A-PCB0/PIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)- Pb-free Package
- K9F1G08U0A-FIB0
48 - Pin WSOP I (12X17X0.7mm)- Pb-free Package
* K9F1G08U0A-V,F(WSOPI ) is the same device as
K9F1G08U0A-Y,P(TSOP1) except package type.
- K9K2G08U1A-ICB0/IIB0
52-ULGA (12X17X0.65mm)

K9F1G08U0A Connection Diagram

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