IP2021CPBF, IP2021PBF, IP2022 Selling Leads, Datasheet
MFG:LT Package Cooled:LGA D/C:0833+
IP2021CPBF, IP2021PBF, IP2022 Datasheet download
Part Number: IP2021CPBF
MFG: LT
Package Cooled: LGA
D/C: 0833+
IP2021CPBF, IP2021PBF, IP2022
- Table of contents:
Info of IP2021CPBF
Info of IP2021PBF
Info of IP2022
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About IP200
PDF/DataSheet Download
Datasheet: IP200
File Size: 308997 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
About IP200
PDF/DataSheet Download
Datasheet: IP200
File Size: 308997 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
About IP2022
PDF/DataSheet Download
Datasheet: IP2022
File Size: 1074863 KB
Manufacturer:
Download : Click here to Download
IP2022 Maximum Ratings
|
Parameter |
Min |
Max |
Units |
| Ambient temperature under bias |
-40 |
85 |
°C |
| Storage temperature |
-65 |
150 |
°C |
| PQFP Soldering temperature ramp to 160-180°C |
2.5 |
°C/sec | |
| PQFP Soldering hold time at 160-180°C |
60 |
110 |
sec |
| PQFP Soldering temperature ramp from 160-180°C to 240°C maximum |
3.0 |
°C/sec | |
| PQFP Soldering hold time at 240°C maximum |
10 |
40 |
sec |
| PQFP Soldering temperature ramp down to 180°C |
5 |
°C/sec | |
| Voltage on DVdd, XVdd, AVdd, and GVdd with respect to Vss |
-0.5 |
3.5 |
V |
| Voltage on IOVdd with respect to Vss |
-0.5 |
4.5 |
V |
| Voltage on Port A through Port F, OSC1, RST, RTCLK1, TSCK, TSI, and TSS inputs with respect to Vss |
-0.5 |
5.7 |
V |
| Voltage on Port G inputs with respect to Vss |
-0.5 |
3.5 |
V |
| Total power dissipation |
1 |
W | |
| Maximum current out of all DVss pins |
400 |
mA | |
| Maximum current into all DVdd pins |
400 |
mA | |
| Maximum allowable sink current per I/O pin |
160 |
mA | |
| Maximum allowable source current per I/O pin (excluding port G) |
160 |
mA | |
| Maximum allowable source current per G pin |
20 |
mA | |
| Maximum allowable sink current per group of I/O pins between IOVss pins |
160 |
mA | |
| Maximum allowable source current per group of I/O pins between IOVdd pins (excluding port G) |
160 |
mA | |
| Latchup |
200 |
mA | |
| JA, 80-pin PQFP Package |
48 |
°C/W | |
| JA, 80-pin BGA Package |
37 |
°C/W | |
| Flash block erase cycle lifetime (if using 20ms block erases - Section 7.1.5) |
20K |
Cycles | |
| Flash bulk erase cycle lifetime |
20K |
Cycles | |
| ESD Human Body Model - all pins |
2000 |
V | |
| ESD Machine Model - all pins |
200 |
V |
IP2022 Features
•Designed to support single-chip networked solutions
•Fast processor core
•64kB Flash program memory
•16kB SRAM data/program memory
•4kB SRAM data memory
•Two SerDes communication blocks supporting common PHYs (Ethernet, USB, UARTs, etc.) and bridging applications (IP2012 has only one SerDes unit)
•Advanced RISC processors
•IP2022 - 120 and 160 MHz versions
•IP2012 - 120 MHz version
•High speed packet processing
•Instruction set optimized for communication functions
•Supports software implementation of traditional hardware functions
•In-system reprogrammable for highest flexibility
•Run time self-programmable
•Vpp = Vcc supply voltage
IP2022 Connection Diagram
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