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FPD13R51JY, FPD1500, FPD1500SOT89

Table of contents:
Info of FPD13R51JY
Info of FPD1500
Info of FPD1500SOT89

FPD13R51JY, FPD1500, FPD1500SOT89 Selling Leads, Datasheet

MFG:FUJITSU D/C:2001

FPD13R51JY, FPD1500, FPD1500SOT89 Picture

FPD13R51JY, FPD1500, FPD1500SOT89 Datasheet download

Five Points

Part Number: FPD13R51JY

MFG: FUJITSU

Package Cooled:

D/C: 2001

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FPD1500 Maximum Ratings

Series

FPD

Frequency (MHz)

1000 to 18,000

Gain (dB)

OP1dB (dBm)

OIP3 (dBm)

Eff (%)

Id (mA)

465

Package/Size (Dim in mm)

Bare Die

FPD1500SOT89 General Description

The FPD1500SOT89 is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT). It utilizes a 0.25 x 1500 m Schottky barrier Gate, defined by high-resolution stepper-based photolithography. The recessed and offset Gate structure minimizes parasitics to optimize performance, with an epitaxial structure designed for improved linearity over a range of bias conditions and input power levels. The FPD1500 is available in die form and in other packages. Typical applications include drivers or output stages in PCS/Cellular base station high-intercept-point LNAs, WLL and WLAN systems, and other types of wireless infrastructure systems.

FPD1500SOT89 Maximum Ratings

Parameter	Symbol	Test Conditions	Min	Max	Units
Drain-Source Voltage	V_DS	-3V < V_GS < +0V		8	V
Gate-Source Voltage	V_GS	0V < V_DS < +8V		-3	V
Drain-Source Current	I_DS	For V_DS > 2V		I_DSS	mA
Gate Current	I_G	Forward or reverse current		15	mA
RF Input Power²	P_IN	Under any acceptable bias state		350	mW
Channel Operating Temperature	T^_CH	Under any acceptable bias state		175	ºC
Storage Temperature	T_STG	Non-Operating Storage	-40	150	ºC
Total Power Dissipation	P_TOT	See De-Rating Note below		2.3	W
Gain Compression	Comp.	Under any bias conditions		5	dB
Simultaneous Combination of Limits³		2 or more Max. Limits		80	%

¹TAmbient = 22°C unless otherwise noted ²Max. RF Input Limit must be further limited if input V_SWR > 2.5:1
³Users should avoid exceeding 80% of 2 or more Limits simultaneously
Notes:
• Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
• Thermal Resitivity specification assumes a Au/Sn eutectic die attach onto a Au-plated copper heatsink or rib.
• Power Dissipation defined as: P_TOT (P_DC + P_IN) P_OUT, where
                                                   P_DC: DC Bias Power
                                                   P_IN: RF Input Power
                                                   P_OUT: RF Output Power
• Absolute Maximum Power Dissipation to be de-rated as follows above 22°C:
                                                   P_TOT=2.3W (0.015W/°C) x T_PACK
where THS = heatsink or ambient temperature above 22°C
(coefficient of de-rating formula is the Thermal Conductivity)
Example: For a 85°C heatsink temperature: P_TOT= 2.3W (0.015 x (65 22)) = 1.66W

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