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FPD1050

Features: 28.5 dBm Linear Output Power at 12 GHz11 dB Power Gain at 12 GHz14 dB Maximum Stable Gain at 12 GHz41 dBm Output IP345% Power-Added EfficiencySpecifications Parameter Symbol Test Conditions Min Max Units Drain-Source Voltage VDS -3V < VGS < +0V 10 V Gate-So...

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SeekIC No. : 004343012 Detail

FPD1050: Features: 28.5 dBm Linear Output Power at 12 GHz11 dB Power Gain at 12 GHz14 dB Maximum Stable Gain at 12 GHz41 dBm Output IP345% Power-Added EfficiencySpecifications Parameter Symbol Test C...

FPD1050 Data Sheet

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Part Number:
FPD1050
Supply Ability:
5000

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  • 1~5000
  • Unit Price
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  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

28.5 dBm Linear Output Power at 12 GHz
11 dB Power Gain at 12 GHz
14 dB Maximum Stable Gain at 12 GHz
41 dBm Output IP3
45% Power-Added Efficiency




Specifications

Parameter Symbol Test Conditions Min Max Units
Drain-Source Voltage VDS -3V < VGS < +0V 10 V
Gate-Source Voltage VGS 0V < VDS < +8V -3 V
Drain-Source Current IDS For VDS > 2V IDSS mA
Gate Current IG Forward or reverse current 10 mA
RF Input Power2 PIN Under any acceptable bias state 175 mW
Channel Operating Temperature TCH Under any acceptable bias state 175 ºC
Storage Temperature TSTG Non-Operating Storage -40 150 ºC
Total Power Dissipation PTOT See De-Rating Note below 3.4 W
Gain Compression Comp. Under any bias conditions 5 dB
Simultaneous Combination of Limits3 2 or more Max. Limits 80 %

*TAmbient = 22°C unless otherwise noted **Users should avoid exceeding 80% of 2 or more Limits simultaneouslyNotes:
• Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
• Thermal Resitivity specification assumes a Au/Sn eutectic die attach onto a Au-plated copper heatsink or rib.
• Power Dissipation defined as: PTOT (PDC + PIN) POUT, where
PDC: DC Bias Power
PIN: RF Input Power
POUT: RF Output Power
• Absolute Maximum Power Dissipation to be de-rated as follows above 22°C:
PTOT= 3.4W (0.022W/°C) x THS
where THS = heatsink or ambient temperature.
Example: For a 85°C heatsink temperature: PTOT = 3.4W (0.022 x (85 22)) = 2.01W

Series FPD
Gain (dB) 11.0
OP1dB (dBm) 28.5
OIP3 (dBm) 41
Eff (%) 45
Gate W / L ([mu]m) 1050/0.25
Vcc (V) 8
Id (mA) 325
Package/Size (Dim in mm) Bare Die





Description

The FPD1050 is an AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT),featuring a 0.25 m by 1050 m Schottky barrier gate, defined by high-resolution stepper-based photolithography. The recessed and offset Gate structure minimizes parasitics to optimize performance. The epitaxial structure and processing have been optimized for reliable high-power applications. The FPD1050 also features Si3N4 passivation and is also available in a low cost plastic SOT89 plastic package.

FPD1050 applications include commercial and other narrowband and broadband high-performance amplifiers, including SATCOM uplink transmitters, PCS/Cellular low-voltage high-efficiency output amplifiers, and medium-haul digital radio transmitters.






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