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The AT90SC9608RT is a low-power, high-performance, 8/16-bit microcontroller with ROM program memory, EEPROM data memory and is based on the secureAVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the AT90SC9608RT achieves throughputs close to 1 MIPS per MHz. Its Harvard architecture includes 32 general purpose working registers directly connected to the ALU, allowing two independent registers to be accessed in one single instruction executed in one clock cycle.
The AT90SC9608RT uses the secureAVR that allows the linear addressing of up to 8M bytes of code and up to 16M bytes of data as well as a number of new functional and security features.The AT90SC9608RT includes 8K bytes of Atmel's high density, non volatile memory.
Additional security features include power and frequency protection logic, logical scrambling on program data and addresses, Power Analysis countermeasures and memory accesses controlled by a supervisor mode.
AT90SC9608RT Features
• High-performance, Low-power secureAVRTM Enhanced RISC Architecture 135 Powerful Instructions (Most Executed in a Single Clock Cycle) • Low Power Idle and Power-down Modes • Bond Pad Locations Conforming to ISO 7816-2 • ESD Protection to ± 6000V • Operating Ranges: 2.7 to 5.5V • Compliant with GSM, 3GPP and EMV 2000 Specifications; PC Industry Compatible • Available in Wafers, Modules, and Industry-standard Packages Memory • 96K Bytes of ROM Program Memory • 8K Bytes of EEPROM, Including 128 OTP Bytes and 384-byte Bit-addressable Area 1 to 64-byte Program / Erase 1.25 ms Program / 1.25 ms Erase Typically More than 500,000 Write/Erase Cycles at a Temperature of 25oC 10 Years Data Retention • 4K Bytes of RAM Peripherals • One ISO 7816 Controller Up to 625 kbps at 5 MHz Compliant with T=0 and T=1 Protocols • One I/O Port • Programmable Internal Oscillator (Up to 20 MHz for Internal CPU Clock) • Two 16-bit Timers • Random Number Generator (RNG) • 2-level, 7-vector Interrupt Controller • Hardware DES and Triple DES DPA Resistant • Checksum Accelerator • CRC 16 & 32 Engine (Compliant with ISO/IEC 3309) Security • Dedicated Hardware for Protection Against SPA/DPA Attacks • Advanced Protection Against Physical Attack, Including Active Shield • Environmental Protection Systems • Voltage Monitor • Frequency Monitor • Temperature Monitor • Light Protection • Secure Memory Management/Access Protection (Supervisor Mode) Development Tools • Voyager Emulation Platform (ATV4) to Support Software Development • IAR Embedded Workbench® V3.20 Debugger or Atmel's AVR Studio® Version 4.07 or Above • Software Libraries and Application Notes
AT90SC9618RCT General Description
The AT90SC9618RCT is a low-power, high-performance, 8/16-bit microcontroller with ROM program memory, EEPROM data memory and a crypto-accelerator, based on the secureAVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the AT90SC9618RCT achieves throughputs close to 1 MIPS per MHz. Its Harvard architecture includes 32 general purpose working registers directly connected to the ALU, allowing two independent registers to be accessed in one single instruction executed in one clock cycle.
The AT90SC9618RCT uses the secureAVR that allows the linear addressing of up to 8M bytes of code and up to 16M bytes of data as well as a number of new functional and security features.
The AT90SC9618RCT includes 18K bytes of Atmel's high density, non volatile memory. The crypto engine featured in the AT90SC series is the AdvX, a 32-bit accelerator dedicated to perform fast encryption or authentication functions.
Additional security features include power and frequency protection logic, logical scrambling on program data and addresses, Power Analysis countermeasures and memory accesses controlled by a supervisor mode.
AT90SC9618RCT Features
General • High-performance, Low-power secureAVR™ Enhanced RISC Architecture 135 Powerful Instructions (Most Executed in a Single Clock Cycle) • Low Power Idle and Power-down Modes • Bond Pad Locations Conforming to ISO 7816-2 • ESD Protection to ± 6000V • Operating Ranges: 2.7 to 5.5V • Compliant with GSM, 3GPP and EMV 2000 Specifications; PC Industry Compatible • Available in Wafers, Modules, and Industry-standard Packages Memory • 96K Bytes of ROM Program Memory • 18K Bytes of EEPROM, Including 128 OTP Bytes and 384-byte Bit-addressable Area 1 to 64-byte Program / Erase 2 ms Program / 2 ms Erase Typically More than 500,000 Write/Erase Cycles at a Temperature of 25oC 10 Years Data Retention • 4K Bytes of RAM • 32K Bytes of ROM Dedicated to Atmel's Crypto Library Peripherals • One ISO 7816 Controller Up to 625 kbps at 5 MHz Compliant with T=0 and T=1 Protocols • One I/O Port • Programmable Internal Oscillator (Up to 40 MHz for AdvX™ and up to 20 MHz for Internal CPU Clock) • Two 16-bit Timers • Random Number Generator (RNG) • 2-level, 7-vector Interrupt Controller • Hardware DES and Triple DES DPA Resistant • Checksum Accelerator • CRC 16 & 32 Engine (Compliant with ISO/IEC 3309) • 32-Bit Cryptographic Accelerator (AdvX) for Public Key Operations RSA, DSA, ECC, Diffie-Hellman Security • Dedicated Hardware for Protection Against SPA/DPA Attacks • Advanced Protection Against Physical Attack, Including Active Shield • Environmental Protection Systems • Voltage Monitor • Frequency Monitor • Temperature Monitor • Light Protection • Secure Memory Management/Access Protection (Supervisor Mode) Development Tools • Voyager Emulation Platform (ATV4) to Support Software Development • IAR Embedded Workbench® V3.20 Debugger or Atmel's AVR Studio® Version 4.07 or Above • Software Libraries and Application Notes