AHA4011B-040PJC, AHA4011C, AHA4011C-040 Selling Leads, Datasheet
MFG:AHA Package Cooled:PLCC D/C:pb-free
AHA4011B-040PJC, AHA4011C, AHA4011C-040 Datasheet download
Part Number: AHA4011B-040PJC
MFG: AHA
Package Cooled: PLCC
D/C: pb-free
AHA4011B-040PJC, AHA4011C, AHA4011C-040
- Table of contents:
Info of AHA4011B-040PJC
Info of AHA4011C
Info of AHA4011C-040
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About AHA3210A-020PQC
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Datasheet: AHA3210A-020PQC
File Size: 437528 KB
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About AHA4011C
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Datasheet: AHA4011C
File Size: 477511 KB
Manufacturer: ETC [ETC]
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About AHA4011C-040 PJC
PDF/DataSheet Download
Datasheet: AHA4011C-040 PJC
File Size: 477511 KB
Manufacturer:
Download : Click here to Download
AHA4011C General Description
The AHA4011C is a single chip integrated circuit that implements a high speed Reed-Solomon Forward Error Correction algorithm. The AHA4011C is a member of the AHA PerFECÔ family of high speed forward error correction (FEC) devices conforming to the Intelsat IESS-308 specification.
The device supports several programmable parameters, including, block size, error threshold, number of check bytes, order of output and mode of operations. Shortened blocks are supported without requirement of zero padding typically required in Reed Solomon decoders. The data input port is used to initialize the programmable parameters and the two on-chip buffers are used to input and output data. Discontinuities in data flow may be controlled by dedicated control pins.
High operating frequency, input and output data rate flexibility, low processing latency and various programmable parameters make this device ideal for many applications including: DTV, DBS, ADSL, Satellite Communications, ISDN, High Performance Modems and networks.
This specification provides full electrical and mechanical information to help a system engineer develop a system using AHA4011C. This document contains descriptions on correction terms, pinout, functions and features, DC and AC characteristics, package and mechanical specifications, ordering information and Related Technical Publications. Software simulation of the RS code as implemented in the device is also available. Please contact AHA or its authorized sales representatives worldwide for copies of Related Technical Publications and software simulation.
AHA4011C Maximum Ratings
| Symbol | Characteristic | Min | Max | Units | Test Conditions |
| Tstg | Storage temperature | -55 | 150 | deg C | |
| Vdd | Supply voltage | -0.5 | 6.0 | V | |
| Vin | Input voltage | Vss-0.5 | Vdd+0.5 | V | |
| Package: 44-pin PLCC (JEDEC Standard) | |||||
AHA4011C Features
HIGH PERFORMANCE
• Polynomial complies to Intelsat IESS-308; RTCA DO-217 Appendix F, Revision D and proposed ITU-TS SG-18 (Formerly CCITT SG- 18) standards
• 40 MBytes/sec burst transfer rate with a 40 MHz clock for all block lengths
• Maximum channel rate of 10 MBytes/sec continuous for block lengths from 54 bytes through 255 bytes using a 40 MHz clock
• Processing latency time less than 15.2 msec in continuous operation for block lengths of 100 bytes
FLEXIBILITY
• Programmable to correct from 1 to 10 error bytes or 20 erasure bytes per block
• Block lengths programmable from 3 to 255 bytes
• Encode, decode or pass-through capability inline with data flow
• Outputs corrected data or correction vectors in forward or reverse order
• Continuous or burst data transfer
• Programmable error threshold to help determine channel performance
SYSTEM INTERFACE
• Byte wide synchronous I/O ports with internal buffering on both ports
• Dedicated control pins permit discontinuities in system data flow
OTHERS
• 44 pin PLCC; 50 mil lead pitch
• Pin and plug compatible with lower performance
AHA4012B
• Software emulation of the algorithm available
AHA4011C Connection Diagram
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