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The LVT16373 and LVTH16373 contain sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state.
The LVTH16373 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.
These latches are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT16373 and LVTH16373 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.
74LVT16373GX Maximum Ratings
Symbol
Parameter
Value
Conditions
Units
VCC
Supply Voltage
−0.5 to +4.6
V
VI
DC Input Voltage
−0.5 to +7.0
V
VO
DC Output Voltage
−0.5 to +7.0
Output in 3-STATE
V
−0.5 to +7.0
Output in HIGH or LOW State (Note 4)
IIK
DC Input Diode Current
−50
VI < GND
mA
IOK
DC Output Diode Current
−50
VO < GND
mA
IO
DC Output Source/Sink Current
64
VO > VCC Output at HIGH State
mA
128
VO > VCC Output at LOW State
ICC
DC Supply Current per Supply Pin
±64
mA
IGND
DC Ground Current per Ground Pin
±128
mA
TSTG
Storage Temperature
−65 to +150
°C
74LVT16373GX Features
Input and output interface capability to systems at 5V VCC Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH16373), also available without bushold feature (74LVT16373) Live insertion/extraction permitted Power Up/Power Down high impedance provides glitch-free bus loading Outputs source/sink 32 mA/64 mA Functionally compatible with the 74 series 16373 Latch-up performance exceeds 500 mA ESD performance: Human-body model ! 2000V Machine model ! 200V Charged-device model ! 1000V Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary)