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74HCT20N - 517, 74HCT221, 74HCT22106

Table of contents:
Info of 74HCT20N - 517
Info of 74HCT221
Info of 74HCT22106

74HCT20N - 517, 74HCT221, 74HCT22106 Selling Leads, Datasheet

MFG:HARRIS/?74HCT20 Package Cooled:DIP D/C:9032

74HCT20N - 517, 74HCT221, 74HCT22106 Picture

74HCT20N - 517, 74HCT221, 74HCT22106 Datasheet download

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Part Number: 74HCT20N - 517

MFG: HARRIS/?74HCT20

Package Cooled: DIP

D/C: 9032

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74HCT221 General Description

The 74HC/HCT221 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

The 74HC/HCT221 are dual non-retriggerable monostable multivibrators. Each multivibrator features an active LOW-going edge input (nA) and an active HIGH-going edge input (nB), either of which can be used as an enable input.

Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. Schmitt-trigger input circuitry for the nB inputs allow jitter-free triggering from inputs with slow transition rates,providing the circuit with excellent noise immunity.

Once triggered, the outputs (nQ, nQ) are independent of further transitions of nA and nB inputs and are a function of the timing components. The output pulses can be terminated by the overriding active LOW reset inputs (nR_D). Input pulses may be of any duration relative to the output pulse.

Pulse width stability is achieved through internal compensation and is virtually independent of V_CC and temperature. In most applications pulse stability will only be limited by the accuracy of the external timing components.

74HCT221 Features

` Pulse width variance is typically less than ± 5%
` Pin-out identical to "123"
` Overriding reset terminates output pulse
` nB inputs have hysteresis for improved noise immunity
` Output capability: standard (except for nR_EXT/C_EXT)
` I_CC category: MSI

74HCT221 Connection Diagram

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