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3D7110, 3D7408S, 3D7408S-.25

3D7110, 3D7408S, 3D7408S-.25 Selling Leads, Datasheet

MFG:NULL  Package Cooled:SOP  D/C:07/08+

3D7110, 3D7408S, 3D7408S-.25 Picture

3D7110, 3D7408S, 3D7408S-.25 Datasheet download

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Part Number: 3D7110

 

MFG: NULL

Package Cooled: SOP

D/C: 07/08+

 

 

 
 
 
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About 3D7110D-.75

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Datasheet: 3D7110D-.75

File Size: 261683 KB

Manufacturer: DATADELAY

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About 3D7010

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Datasheet: 3D7010

File Size: 259272 KB

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Datasheet: 3D7010

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3D7110 General Description

The 3D7110 10-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 10 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 0.75ns through 8.0ns. The input is reproduced at the outputs without inversion, shifted in time as per the user-specified dash number. The 3D7110 is TTL- and CMOScompatible, capable of driving ten 74LS-type loads, and features both rising- and falling-edge accuracy.

The all-CMOS 3D7110 integrated circuit has been designed as a reliable, economic alternative to hybrid TTL fixed delay lines. It is offered in a standard 14-pin auto-insertable DIP and space saving surface mount 14- and 16-pin SOIC packages.

3D7110 Features

• All-silicon, low-power CMOS technology
• TTL/CMOS compatible inputs and outputs
• Vapor phase, IR and wave solderable
• Auto-insertable (DIP pkg.)
• Low ground bounce noise
• Leading- and trailing-edge accuracy
• Delay range: .75 through 80ns
• Delay tolerance: 5% or 1ns
• Temperature stability: ±3% typical (0C-70C)
• Vdd stability: ±1% typical (4.75V-5.25V)
• Minimum input pulse width: 15% of total delay
• 14-pin Gull-Wing and 16-pin SOIC
available as drop-in replacements
for hybrid delay lines

3D7110 Connection Diagram

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