V62C2801024L(L)

Features: • Ultra Low-power consumption -Active: 25mA at 70ns-tand-by: 5 mA (CMOS input/output) 1mA CMOS input/output, L version• Single +2.2V to 2.7V Power Supply• Equal access and cycle time• 70/85/100/150 ns access time• Easy memory expansion with CE1, CE2 nd OE i...

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SeekIC No. : 004540208 Detail

V62C2801024L(L): Features: • Ultra Low-power consumption -Active: 25mA at 70ns-tand-by: 5 mA (CMOS input/output) 1mA CMOS input/output, L version• Single +2.2V to 2.7V Power Supply• Equal access a...

floor Price/Ceiling Price

Part Number:
V62C2801024L(L)
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/18

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Product Details

Description



Features:

• Ultra Low-power consumption
                  -Active: 25mA at 70ns
                - tand-by: 5 mA (CMOS input/output)
                               1  mA CMOS input/output, L version
• Single +2.2V to 2.7V Power Supply
• Equal access and cycle time
• 70/85/100/150 ns access time
• Easy memory expansion with CE1, CE2 nd OE inputs
• 1.0V data retention mode
• TTL compatible, Tri-state input/output
• Automatic power-down when deselected



Pinout

  Connection Diagram


Specifications

Parameter
Symbol
Minimum
Maximum
Unit
Voltage on Any Pin Relative to Gnd
Vt
-0.5
4.6
V
Power Dissipation
PT
-
1.0
W
Storage Temperature (Plastic)
Tstg
-55
+150
0C
Temperature Under Bias
Tbias
-40
+85
0C



Description

The V62C2801024L(L) is a low power CMOS Static RAM organized s 131,072 words by 8 bits. Easy memory expansion is rovided by an active LOW CE1, an active HIGH CE2, an ctive LOW OE, and Tri-state I/O's. This device has an automatic wer-down mode feature when deselected.

Writing to the device is accomplished by taking Chip Enable (CE1) with Write Enable (WE) LOW, and Chip Enable (CE2) HIGH. Reading from the device is performed y taking Chip Enable 1 (CE1) with Output Enable OE) LOW while Write Enable (WE) and Chip Enable 2 CE2) is HIGH. The I/O pins are placed in a high-impedance tate when the device is deselected: the outputs are disabled uring a write cycle.

The V62C2801024L(L) comes with a 1V data retention feature nd Lower Standby Power. The V62C2801024L is available in 32pin 8 x 20 mm TSOP1 / STSOP / 48-fpBGA packages.




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