Features: • Ultra Low-power consumption - Active: 30mA ICC at 70ns - Stand-by: 5 A(CMOS input/output) 1 A(CMOS input/output,Lversion)• 70/85/100/120 ns access time• Equal access and cycle time• Single +1.8V to 2.2V Power Supply• Tri-state output• Automatic power...
V62C1161024L: Features: • Ultra Low-power consumption - Active: 30mA ICC at 70ns - Stand-by: 5 A(CMOS input/output) 1 A(CMOS input/output,Lversion)• 70/85/100/120 ns access time• Equal access an...
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Features: ` High-speed: 35, 70 ns` Ultra low DC operating current of 5mA (max.)` Low Power Dissipa...
DescriptionThe V62C5181024-1 is one of the V62C5181024 series.The V62C5181024-1 is a 1,048,576-bit...
Parameter | Symbol | Minimum | Maximum | Unit |
Voltage on Any Pin Relative to Gnd | Vt | -0.5 | +4.0 | V |
Power Dissipation | PT | - | 1.0 | W |
Storage Temperature (Plastic) | Tstg | -55 | +150 | |
Temperature Under Bias | Tbias | -40 | +85 |
The V62C1161024L is a Low Power CMOS Static RAM organized as 65,536 words by 16 bits. Easy memory expansion is provided by an active LOW (CE) and (OE) pin.
This device has an automatic power-down mode feature when deselected. Separate Byte Enable controls (BLE and BHE) allow individual bytes to be accessed. BLE controls the lower bits I/O1 - I/O8. BHE controls the upper bits I/O9 - I/O16.
Writing to these devices is performed by taking Chip Enable (CE) with Write Enable (WE) and Byte Enable (BLE/BHE) LOW.
Reading from the device is performed by taking Chip Enable (CE) with Output Enable (OE) and Byte Enable (BLE/BHE) LOW while Write Enable (WE) is held HIGH.