V62C1801024L(L)

Features: • Ultra Low-power consumption ative: 20mA at 70ns and-by: 5 mA (CMOS input/output)1 mAMOS input/output, L version• Single +1.8V to 2.2V Power Supply• Equal access and cycle time• 70/85/100/150 ns access time• Easy memory expansion with CE1, CE2 nd OE inputs...

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SeekIC No. : 004540199 Detail

V62C1801024L(L): Features: • Ultra Low-power consumption ative: 20mA at 70ns and-by: 5 mA (CMOS input/output)1 mAMOS input/output, L version• Single +1.8V to 2.2V Power Supply• Equal access and cy...

floor Price/Ceiling Price

Part Number:
V62C1801024L(L)
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/2/15

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Product Details

Description



Features:

• Ultra Low-power consumption
                   ative: 20mA at 70ns
                   and-by: 5 mA (CMOS input/output)
                               1 mAMOS input/output, L version
• Single +1.8V to 2.2V Power Supply
• Equal access and cycle time
• 70/85/100/150 ns access time
• Easy memory expansion with CE1, CE2 nd OE inputs
• 1.0V data retention mode
• TTL compatible, Tri-state input/output
• Automatic power-down when deselected



Pinout

  Connection Diagram




Specifications

Parameter
Symbol
Minimum
Maximum
Unit
Voltage on Any Pin Relative to Gnd
Vt
-0.5
4.6
V
Power Dissipation
PT
-
1.0
W
Storage Temperature (Plastic)
Tstg
-55
+150
0C
Temperature Under Bias
Tbias
-40
+85
0C



Description

The V62C1801024L(L) is a low power CMOS Static RAM organized s 131,072 words by 8 bits. Easy memory expansion s provided by an active LOW CE1, an active HIGH CE2, an ctive LOW OE, and Tri-state I/O's. This device has an automatic ower-down mode feature when deselected.

Writing to the device is accomplished by taking Chip Enable (CE1 ) with Write Enable (WE) LOW, and Chip Enable (CE2) HIGH. Reading from the device is performed by aking Chip Enable 1 (CE1) with Output Enable (OE) OW while Write Enable (WE ) and Chip Enable 2 (CE2 s HIGH. The I/O pins are placed in a high-impedance state hen the device is deselected: the outputs are disabled uring a write cycle.

The V62C1801024L(L) comes with a 1V data retention feature nd Lower Standby Power. The V62C1801024L is available in 32-pin 8 x 20 mm TSOP1 / STSOP / 48-fpBGA packages.




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