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V436616Y24VATG-75

Features: JEDEC-standard 144 pin, Small-Outline, Dual in line Memory Module (SODIMM) Serial Presence Detect with E2PROM Nonbuffered Fully Synchronous, All Signals Registered on Positive Edge of System Clock Single +3.3V (± 0.3V) Power Supply All Device Pins are LVTTL Compatible 8192 Refresh Cycle...

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SeekIC No. : 004539848 Detail

V436616Y24VATG-75: Features: JEDEC-standard 144 pin, Small-Outline, Dual in line Memory Module (SODIMM) Serial Presence Detect with E2PROM Nonbuffered Fully Synchronous, All Signals Registered on Positive Edge of Sys...

V436616Y24VATG-75 Data Sheet

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Part Number:
V436616Y24VATG-75
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

JEDEC-standard 144 pin, Small-Outline, Dual in line Memory Module (SODIMM)
Serial Presence Detect with E2PROM
Nonbuffered
Fully Synchronous, All Signals Registered on Positive Edge of System Clock
Single +3.3V (± 0.3V) Power Supply
All Device Pins are LVTTL Compatible
8192 Refresh Cycles every 64 ms
Self-Refresh Mode
Internal Pipelined Operation; Column Address can be changed every System Clock
Auto Precharge and Piecharge all Banks by A10
Data Mask Function by DQM
Mode Register Set Programming
Programmable (CAS Latency:2, 3 Clocks)


Specifications

Symbol

Parameter

Limit Values

Unit

Min.

Max.

VIH

Input High Voltage

2.0

VCC+0.3

V

VIL

Input Low Voltage

0.5

0.8

V

VOH

Output High Voltage (IOUT = 2.0 mA)

2.4

-

V

VOL

Output Low Voltage (IOUT = 2.0 mA)

-

0.4

V

II(L)

Input Leakage Current, any input
(0 V < VIN < 3.6 V, all other inputs = 0V)

40

40

mA

IO(L)

Output leakage current
(DQ is disabled, 0V < VOUT < VCC)

40

40

mA




Description

The V436616Y24VATG-75 memory module is organized 16,777,216 x 64 bits in a 144 pin SODIMM. The 16M x 64 memory module uses 4 Mosel-Vitelic 16M x 16 SDRAM. The x64 modules are ideal for use in high performance computer systems where increased memory density and fast access times are required.




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