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IC42S32400

Features: · Concurrent auto precharge· Clock rate:166/143/125 MHz· Fully synchronous operation· Internal pipelined architecture· Four internal banks (1M x 32bit x 4bank)· Programmable Mode -CAS#Latency:2 or 3 -Burst Length:1,2,4,8,or full page -Burst Type:interleaved or linear burst -Burst-Read-Si...

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SeekIC No. : 004370390 Detail

IC42S32400: Features: · Concurrent auto precharge· Clock rate:166/143/125 MHz· Fully synchronous operation· Internal pipelined architecture· Four internal banks (1M x 32bit x 4bank)· Programmable Mode -CAS#Late...

IC42S32400 Data Sheet

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Part Number:
IC42S32400
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

· Concurrent auto precharge
· Clock rate:166/143/125 MHz
· Fully synchronous operation
· Internal pipelined architecture
· Four internal banks (1M x 32bit x 4bank)
· Programmable Mode
   -CAS#Latency:2 or 3
   -Burst Length:1,2,4,8,or full page
   -Burst Type:interleaved or linear burst
   -Burst-Read-Single-Write
· Burst stop function
· Individual byte controlled by DQM0-3
· Auto Refresh and Self Refresh
· 4096 refresh cycles/64ms
· Single +3.3V ±0.3V power supply
· Interface:LVTTL
· Package:400 x 875 mil,86 Pin TSOP-2,0.50mm Pin
    Pitch and 11x13mm, 90 Ball BGA, Ball pitch 0.8mm
· Pb-free package is available.


Pinout

Connection Diagram


Specifications

Symbol Parameters Rating Unit
VDD Supply Voltage (with respect to VSS) 0.5 to +4.6 V
VDDQ Supply Voltage for Output (with respect to VSSQ) 0.5 to +4.6 V
VI Input Voltage (with respect to VSS) 0.5 to VDD+0.5 V
VO Output Voltage (with respect to VSSQ) 1.0 to VDDQ+0.5 V
IO Short circuit output current 50 mA
PD Power Dissipation (TA = 25 ) 1 W
TOPT Operating Temperature 0 to +70
TSTG Storage Temperature 65 to +150



Description

The ICSI IC42S32400 and IC42S32400L is a high-speed CMOS configured as a quad 1M x 32 DRAM with a
synchronous interface (all signals are registered on the positive edge of the clock signal,CLK).

Each of the 1M x 32 bit banks is organized as 4096 rows by 256 columns by 32 bits.Read and write accesses start at a selected locations in a programmed sequence. Accesses begin with the registration of a BankActivecommandwhichis then followed by a Read or Writecommand

The ICSI IC42S32400 and IC42S32400L provides for programmable Read or Write burst lengths of 1,2,4,8,or fullpage, with a burst termination operation. An auto precharge function may be enable to provide a self-timedrow precharge that is initiated at the end of the burst sequence.The refresh functions,either Auto or Self Refresh are easy to use.By having a programmable mode register,the system can choose the most suitable modes to maximize itsperformance.
These devices are well suited for applications requiring high memory bandwidth.




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