HMN1M8DV

Features: · Access time : 70, 85, 120, 150 ns· High-density design : 8Mbit Design· Battery internally isolated until power is applied· Industry-standard 36-pin 1,024K x 8 pinout· Unlimited write cycles· Data retention in the absence of VCC· 10-years minimum data retention in absence of power· Auto...

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HMN1M8DV Picture
SeekIC No. : 004364735 Detail

HMN1M8DV: Features: · Access time : 70, 85, 120, 150 ns· High-density design : 8Mbit Design· Battery internally isolated until power is applied· Industry-standard 36-pin 1,024K x 8 pinout· Unlimited write cyc...

floor Price/Ceiling Price

Part Number:
HMN1M8DV
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/10/30

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Product Details

Description



Features:

· Access time : 70, 85, 120, 150 ns
· High-density design : 8Mbit Design
· Battery internally isolated until power is applied
· Industry-standard 36-pin 1,024K x 8 pinout
· Unlimited write cycles
· Data retention in the absence of VCC
· 10-years minimum data retention in absence of power
· Automatic write-protection during power-up/power-down
cycles
· Data is automatically protected during power loss




Pinout

  Connection Diagram


Specifications

PARAMETER
SYMBOL
RATING
CONDITIONS
DC voltage applied on VCC relative to VSS
VCC
-0.5V to Vcc+0.5
DC Voltage applied on any pin excluding VCC
relative to VSS
VT
-0.3V to 4.6V
VT VCC+0.3
Operating temperature
TOPR
0 to 70°C
Storage temperature
TSTG
-65°C to 150°C
Soldering temperature
TSOLDER
260°C
For 10 second



Description

The HMN1M8DV Nonvolatile SRAM is a 8,388,608-bit static RAM organized as 1,048,576 bytes by 8 bits.

The HMN1M8DV has a self-contained lithium energy source provide reliable non-volatility coupled with the unlimited write cycles of standard SRAM and integral control circuitry which constantly monitors the single 3.3V supply for an out-oftolerance condition. When such a condition occurs, the lithium energy source is automatically switched on to sustain the memory until after VCC returns valid and write protection is unconditionally enabled to prevent garbled data. In addition the SRAM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy source is switched on to sustain the memory until after VCC returns valid.

The HMN1M8DV uses extremely low standby current CMOS SRAM's, coupled with small lithium coin cells to provide nonvolatility without long write-cycle times and the write-cycle limitations associated with EEPROM.




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