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ZVP2106GTA, ZVP2110A, ZVP2110G

Table of contents:
Info of ZVP2106GTA
Info of ZVP2110A
Info of ZVP2110G

ZVP2106GTA, ZVP2110A, ZVP2110G Selling Leads, Datasheet

MFG:ZETEX Package Cooled:SOT223 D/C:08+

ZVP2106GTA, ZVP2110A, ZVP2110G Datasheet download

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Part Number: ZVP2106GTA

MFG: ZETEX

Package Cooled: SOT223

D/C: 08+

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ZVP2110A Maximum Ratings

Part Number	ZVP2110A
Config/ Polarity	P
P_D (W)	0.7
V_DSS (V)	-100
V_GSS(+/-) (V)	20
I_D (A)	-0.23
R_{DS (on) Max}(Ω) @ V_GS; -3.5V	-
R_{DS (on) Max}(Ω) @ V_GS; -6V	-
R_{DS (on) Max}(Ω) @ V_GS; -10.0V	8
V_GS(th) (V)	-3.5
C_iss (typ) (pF)	100(Max)
Qg (typ) (nC) @ V_GS; 10V	-

ZVP2110G General Description

The ZVP2110G is designed as SOT223 P-channel enhancement mode vertical DMOS FET.

It has two features. (1) It has 100 volt Vds. (2) Its Rds(on) is 8. That are all the main features.

Some absolute maximum ratings have been concluded into several points as follow. (1) Its drain-source voltage is -100V. (2) Its continuous drain current at Tamb=25°C would be -310mA. (3) Its pulsed drain current would be -3A. (4) Its gate source voltage would be ±20V. (5) Its power dissipation at Tamb=25°C would be 2W. (6) Its operating and storage temperature range would be from -55 to +150°C.

Also some electrical characteristics about it. (1) Its drain-source breakdown voltage would be min -100V with condition of Id=-1mA and Vgs=0. (2) Its gate to source threshold voltage would be min -1.5V and max -3.5V with condition of Id=-1mA and Vds=Vgs. (3) Its gate to body leakage would be max 20nA with condition of Vgs=±20V and Vds=0. (4) Its zero gate voltage drain current would be max -1uA with condition of Vds=-100V and Vgs=0 and would be max -100uA with condition of Vds=-80V and Vgs=0, T=125°C. (5) Its on-state drain current would be min -750mA with condition of Vds=-25V and Vgs=-10V. (6) Its static drain-source on-state resistance would be max 8 with condition of Vgs=-10V and Id=-375mA. (7) Its forward transconductance would be min 125mS with condition of Vds=-25V and Id=-375mA. (8) Its input capacitance would be max 100pF with condition of Vds=-25V and Vgs=0V and f=1MHz. (9) Its common source output capacitance would be max 35pF with condition of with condition of Vds=-25V and Vgs=0V and f=1MHz. (10) Its reverse transfer capacitance would be max 10pF with condition of Vds=-25V and Vgs=0V and f=1MHz. (11) Its turn-on delay time would be max 7ns. (12) Its rise time would be max 15ns. (13) Its turn-off time would be max 12ns. (14) Its fall time would be max 15ns. And so on. If you have any question or suggestion or want to know more information please contact us for details. Thank you!

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