PDI1394L, PDI1394L11D, PDI1394L21 Selling Leads, Datasheet
MFG:N/A Package Cooled:QFP80 D/C:N/A
PDI1394L, PDI1394L11D, PDI1394L21 Datasheet download
Part Number: PDI1394L
MFG: N/A
Package Cooled: QFP80
D/C: N/A
MFG:N/A Package Cooled:QFP80 D/C:N/A
PDI1394L, PDI1394L11D, PDI1394L21 Datasheet download
MFG: N/A
Package Cooled: QFP80
D/C: N/A
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Datasheet: PDI1394L11
File Size: 301674 KB
Manufacturer: PHILIPS [Philips Semiconductors]
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PDF/DataSheet Download
Datasheet: PDI1284P11
File Size: 143896 KB
Manufacturer: PHILIPS [Philips Semiconductors]
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PDF/DataSheet Download
Datasheet: PDI1394L21
File Size: 351539 KB
Manufacturer: PHILIPS [Philips Semiconductors]
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The PDI1394L21, Philips Semiconductors Full Duplex 1394 Audio/Video (AV) Link Layer Controller, is an IEEE 13941995 compliant link layer controller featuring 2 embedded AV layer interfaces. The AV layers are designed to pack and un-pack application data packets for transmission over the IEEE 1394 bus using isochronous data transfers. Because of its full duplex architecture, the PDI1394L21 is capable of receiving and transmitting isochronous data during the same bus cycle. Two 8 bit AV ports, each with its own buffer (FIFO), receive and output isochronous data for transmission and reception of bus packets.
Each port can be configured to receive or transmit, however, the other port always performs the opposite function. Half duplex operation is also permitted.
The application data is packetized according to the IEC 61883 International Standard of Interface for Consumer Electronic Audio/Video Equipment. Both AV layer interfaces are byte-wide ports capable of accommodating various MPEG2 and DVC codecs. An 80C51 compatible byte-wide host interface is provided for internal register configuration as well as performing asynchronous data transfers.
The PDI1394L21 is powered by a single 3.3V power supply and the inputs and outputs are 5V tolerant. It is available in the LQFP100 and TQFP100 packages.
SYMBOL |
PARAMETER |
CONDITIONS |
LIMITS |
UNIT | |
MIN |
MAX | ||||
VDD |
DC supply voltage |
0.5 |
+4.6 |
V | |
IIK |
DC input diode current |
50 |
mA | ||
VI |
DC input voltage |
0.5 |
+5.5 |
V | |
IOK |
DC output diode current |
±50 |
mA | ||
VO |
DC output voltage |
0.5 |
VDD +0.5 |
V | |
IO |
DC output source or sink current |
±50 |
mA | ||
IGND , ICC |
DC VCC or GND current |
±150 |
mA | ||
Tstg |
Storage temperature range |
60 |
150 |
||
Tamb |
Operating ambient temperature |
0 |
70 |
||
Ptot |
Power dissipation per package |
0.6 |
W |
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure toabsolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
` IEEE 13941995 Standard Link Layer Controller
` Hardware Support for the IEC61883 International Standard of Digital Interface for Consumer Electronics
` Interface to any IEEE 13941995 Physical Layer Interface
` 5V Tolerant I/Os
` Single 3.3V supply voltage
` Full-duplex isochronous operation
` Operates with 400/200/100 Mbps physical layer devices
` Dual 4K Byte FIFOs for isochronous data
` Supports single capacitor isolation mode and IEEE 13941995, Annex J. isolation
` 4-field deep SYT buffer added to enhance real-time isochronous synchronization using the AVFSYNC pin
` Generates its own AV port clocks under software control. Select one of three frequencies: 24.576, 12.288, or 6.144 MHz