OXFW900, OXFW900TQ-A, OXFW911 Selling Leads, Datasheet
MFG:OXFW Package Cooled:QFP D/C:03+
OXFW900, OXFW900TQ-A, OXFW911 Datasheet download
Part Number: OXFW900
MFG: OXFW
Package Cooled: QFP
D/C: 03+
OXFW900, OXFW900TQ-A, OXFW911
- Table of contents:
Info of OXFW900
Info of OXFW900TQ-A
Info of OXFW911
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About OXFW900
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Datasheet: OXFW900
File Size: 191564 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
About OXFW900
PDF/DataSheet Download
Datasheet: OXFW900
File Size: 191564 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
About OXFW911
PDF/DataSheet Download
Datasheet: OXFW911
File Size: 144756 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
OXFW900 General Description
The OXFW900 is a high-performance 1394 to ATA/ATAPI (IDE) native bridge with an integrated target Serial Bus Protocol (SBP-2 ) controller. By supporting the SBP-2 protocol, the device can use generic SBP-2 drivers available in the Microsoft Windows 98SE, Microsoft Windows 2000, Microsoft Millennium and Apple MacOS operating systems.
The device is ideally suited for smart-cable or tailgate interface applications for removable-media drives, compact flash card readers, CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM and hard disk drives, allowing IDE drives to be connected to a 1394 serial bus in a plug-and-play fashion.
Both ATA and ATAPI devices are supported using the same firmware.
This highly integrated device offers a three-chip solution to native bridge applications using an external 1394 PHY and Flash ROM. A slow 32Kx8 Flash ROM (up to 120ns) is sufficient for most optical media applications. For applications that need a sustained data rate in excess of 10Mbytes per second, for example high performance disk drives, an 8-bit 50ns FLASH or faster is recommended.
The device is compatible with both 1394-1995 and 1394A PHYs.
The LINK controller complies with S400 1394-1995 specification. The 1394 transaction layer and SBP-2 protocol is implemented using a combination of the ARM7TDMI (low-power 32-bit RISC processor), an ORB (Operational Request Block) hardware co-processor and a high performance buffer manager.
The Buffer Manager has a RAM bandwidth of 800Mbps. It provides storage for 1394 and ATA/ATAPI packets, automatically storing them and passing them to the appropriate destinations, without any intervention from the processor. It also provides storage and manages the sequencing of ORB fetching to reduce latency and improve data throughput.
The configuration data including the IEEE OUI (Organisational Unique Identifier) and device serial number is stored in the Flash ROM which may be uploaded from the 1394 bus, even when blank. The device also facilitates firmware uploads from the 1394 bus.
The ORB co-processor translates ORBs as defined in the SBP-2 protocol into ATA/ATAPI commands, and automatically stores error/status messages at an address specified by the host.
Concurrent operation of the ATA/ATAPI and 1394 interfaces are facilitated using the high throughput Buffer Manager where LINK, ATAPI manager and ARM7TDMI can perform interleaved accesses to the on-chip RAM buffer. The high performance processor ensures that no significant latency is incurred. The ATA command translation is performed in firmware to meet RBC (Reduced Block Commands) standard, T10-1228D. The ATA/ATAPI Manager supports PIO modes 0 to 4, DMA modes 0 to 2 and Ultra DMA mode 0 to 2 and provides the interface to the IDE bus. It is compliant with T13-1153D, ATA-4 specification.
The device is ideally suited for smart-cable or tailgate interface applications for removable-media drives, compact flash card readers, CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM and hard disk drives, allowing IDE drives to be connected to a 1394 serial bus in a plug-and-play fashion.
Both ATA and ATAPI devices are supported using the same firmware.
This highly integrated device offers a three-chip solution to native bridge applications using an external 1394 PHY and Flash ROM. A slow 32Kx8 Flash ROM (up to 120ns) is sufficient for most optical media applications. For applications that need a sustained data rate in excess of 10Mbytes per second, for example high performance disk drives, an 8-bit 50ns FLASH or faster is recommended.
The device is compatible with both 1394-1995 and 1394A PHYs.
The LINK controller complies with S400 1394-1995 specification. The 1394 transaction layer and SBP-2 protocol is implemented using a combination of the ARM7TDMI (low-power 32-bit RISC processor), an ORB (Operational Request Block) hardware co-processor and a high performance buffer manager.
The Buffer Manager has a RAM bandwidth of 800Mbps. It provides storage for 1394 and ATA/ATAPI packets, automatically storing them and passing them to the appropriate destinations, without any intervention from the processor. It also provides storage and manages the sequencing of ORB fetching to reduce latency and improve data throughput.
The configuration data including the IEEE OUI (Organisational Unique Identifier) and device serial number is stored in the Flash ROM which may be uploaded from the 1394 bus, even when blank. The device also facilitates firmware uploads from the 1394 bus.
The ORB co-processor translates ORBs as defined in the SBP-2 protocol into ATA/ATAPI commands, and automatically stores error/status messages at an address specified by the host.
Concurrent operation of the ATA/ATAPI and 1394 interfaces are facilitated using the high throughput Buffer Manager where LINK, ATAPI manager and ARM7TDMI can perform interleaved accesses to the on-chip RAM buffer. The high performance processor ensures that no significant latency is incurred. The ATA command translation is performed in firmware to meet RBC (Reduced Block Commands) standard, T10-1228D. The ATA/ATAPI Manager supports PIO modes 0 to 4, DMA modes 0 to 2 and Ultra DMA mode 0 to 2 and provides the interface to the IDE bus. It is compliant with T13-1153D, ATA-4 specification.
OXFW900 Maximum Ratings
| Symbol | Parameter | Min | Max | Units |
| VDD | DC supply voltage | 3.0 | 3.6 | V |
| VBB | 5V PMOS bulk bias | 4.75 | 5.25 | V |
| TC | Temperature | 0 | 70 |
OXFW900 Features
· S400 compliant 1394-1995 Link and Transaction layers
· Compatible with 1394-1995 and 1394A Phys.
· Buffer Manager with max. RAM bandwidth of 800Mbps
· Microsoft Win98-Second Edition, Win2000 and Apple MacOS 8.5 generic driver support
· SBP-2 Target Revision 4 compliant interface
· Fully ATA-4 compliant (see T13-1153D)
· Sustained IDE transfer rate of 25 Mbytes per second, Peak transfer rate of 50Mbytes per second.
· Supports PIO modes 0 to 4, DMA modes 0 to 2 and Ultra DMA modes 0 to 2
· Integrated 32-bit RISC processor (ARM7TDMI) with on-chip scratch RAM
· ORB co-processor to accelerate translation of ORBs to ATAPI commands
· Supports ORB chaining for increased performance
· High performance ATA command translation in firmware using Reduced Block Command (RBC) set
· Optional External Serial ROM interface for configuration data, user serial number, etc.
· Blank Flash memory programming feature via 1394 bus
· 3.3 Volts operation
· Low Power CMOS
· Firmware and Flash Programming Utilities supplied by Oxford Semiconductor
· ultra-thin 128-TQFP package (14mm x 14mm x 1mm )
· Compatible with 1394-1995 and 1394A Phys.
· Buffer Manager with max. RAM bandwidth of 800Mbps
· Microsoft Win98-Second Edition, Win2000 and Apple MacOS 8.5 generic driver support
· SBP-2 Target Revision 4 compliant interface
· Fully ATA-4 compliant (see T13-1153D)
· Sustained IDE transfer rate of 25 Mbytes per second, Peak transfer rate of 50Mbytes per second.
· Supports PIO modes 0 to 4, DMA modes 0 to 2 and Ultra DMA modes 0 to 2
· Integrated 32-bit RISC processor (ARM7TDMI) with on-chip scratch RAM
· ORB co-processor to accelerate translation of ORBs to ATAPI commands
· Supports ORB chaining for increased performance
· High performance ATA command translation in firmware using Reduced Block Command (RBC) set
· Optional External Serial ROM interface for configuration data, user serial number, etc.
· Blank Flash memory programming feature via 1394 bus
· 3.3 Volts operation
· Low Power CMOS
· Firmware and Flash Programming Utilities supplied by Oxford Semiconductor
· ultra-thin 128-TQFP package (14mm x 14mm x 1mm )
OXFW900 Connection Diagram
OXFW911 General Description
The OXFW911 is a high-performance 1394 to ATA/ATAPI (IDE) native bridge with an integrated target Serial Bus Protocol (SBP-2 ) controller. By supporting the SBP-2 protocol, the device can use generic SBP-2 drivers available in the Microsoft Windows 98SE, Microsoft Windows 2000, Microsoft Millennium and Apple MacOS (8.4 to 9.04) operating systems. MacOS support also includes booting from Firewire disk.
The device is ideally suited for smart-cable or tailgate interface applications for removable-media drives, compact flash card readers, CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM and hard disk drives, allowing IDE drives to be connected to a 1394 serial bus in a plug-and-play fashion.
Both ATA and ATAPI devices are supported using the same firmware.
This highly integrated device offers a two-chip solution to native bridge applications using an external 1394 PHY. The device is compatible with both 1394-1995 and 1394A PHYs.
The LINK controller complies with 1394-1995 and 1394A specifications. The 1394 transaction layer and SBP-2 protocol is implemented using a combination of the ARM7TDMI (low-power 32-bit RISC processor), an ORB (Operational Request Block) hardware co-processor and a high performance buffer manager.
The buffer manager has a RAM bandwidth of 800Mbps. It provides storage for 1394 and ATA/ATAPI packets, automatically storing them and passing them to the appropriate destinations, without any intervention from the processor. It also provides storage and manages the sequencing of ORB fetching to reduce latency and improve data throughput.
The configuration data including the IEEE OUI (Organisational Unique Identifier) and device serial number is stored in the Flash ROM which may be uploaded from the 1394 bus, even when blank. The device also facilitates firmware uploads from the 1394 bus.
The ORB co-processor translates ORBs as defined in the SBP-2 protocol into ATA/ATAPI commands, and automatically stores error/status messages at an address specified by the host.
Concurrent operation of the ATA/ATAPI and 1394 interfaces are facilitated using the high throughput buffer manager where LINK, ATAPI manager and ARM7TDMI can perform interleaved accesses to the on-chip RAM buffer. The high performance processor ensures that no significant latency is incurred. The ATA command translation is performed in firmware to meet RBC (Reduced Block Commands) standard, T10-1228D. The ATA/ATAPI Manager supports PIO modes 0 to 4, DMA modes 0 to 2 and Ultra DMA mode 0 to 5 and provides the interface to the IDE bus. It is compliant with T13-1321D, ATA-5 specification, as well as support for ATA100.
OXFW911 Maximum Ratings
| Symbol | Parameter | Min | Max | Units |
| VDD | DC supply voltage | 3.15 | 3.6 | V |
| TC | Temperature | 0 | 70 |
OXFW911 Features
· S400 (50 Mbytes/s) compliant 1394-1995 Link and Transaction layers
· Compatible with 1394-1995 and 1394A Phys.
· Microsoft Win98-Second Edition, Win2000 and Apple MacOS generic driver support
· SBP-2 Target Revision 4 compliant interface
· Fully ATA-5 compliant (see T13-1321D)
· Support for UDMA5 (ATA100)
· Sustained data transfer of 35 MB/s
· Supports PIO modes 0 to 4, DMA modes 0 to 2 and Ultra DMA modes 0 to 5
· ORB co-processor to accelerate translation of ORBs to ATAPI commands
· Supports ORB chaining for increased performance
· High performance ATA command translation in firmware using Reduced Block Command (RBC) set
· Integrated 32-bit RISC processor (ARM7TDMI) with on-chip scratch RAM
· Optional External Serial ROM interface for configuration data, user serial number, etc.
· Integrated 512kb Flash memory
· Blank Flash memory programming feature via 1394 bus
· Firmware and Flash Programming Utilities supplied by Oxford Semiconductor
· 3.3 Volts operation
· Low Power CMOS
· Ultra-thin 128-TQFP package (14 x 14 x 1 mm)
· Compatible with 1394-1995 and 1394A Phys.
· Microsoft Win98-Second Edition, Win2000 and Apple MacOS generic driver support
· SBP-2 Target Revision 4 compliant interface
· Fully ATA-5 compliant (see T13-1321D)
· Support for UDMA5 (ATA100)
· Sustained data transfer of 35 MB/s
· Supports PIO modes 0 to 4, DMA modes 0 to 2 and Ultra DMA modes 0 to 5
· ORB co-processor to accelerate translation of ORBs to ATAPI commands
· Supports ORB chaining for increased performance
· High performance ATA command translation in firmware using Reduced Block Command (RBC) set
· Integrated 32-bit RISC processor (ARM7TDMI) with on-chip scratch RAM
· Optional External Serial ROM interface for configuration data, user serial number, etc.
· Integrated 512kb Flash memory
· Blank Flash memory programming feature via 1394 bus
· Firmware and Flash Programming Utilities supplied by Oxford Semiconductor
· 3.3 Volts operation
· Low Power CMOS
· Ultra-thin 128-TQFP package (14 x 14 x 1 mm)
OXFW911 Connection Diagram
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