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MTP50P03HDL TO-220 2200 ONSEMI 2000+ -, MTP52N06, MTP52N06VL

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Info of MTP50P03HDL TO-220 2200 ONSEMI 2000+ -
Info of MTP52N06
Info of MTP52N06VL

MTP50P03HDL TO-220 2200 ONSEMI 2000+ -, MTP52N06, MTP52N06VL Selling Leads, Datasheet

MFG:MOT/ON Package Cooled:MOT D/C:N/A

MTP50P03HDL TO-220 2200 ONSEMI 2000+ -, MTP52N06, MTP52N06VL Picture

MTP50P03HDL TO-220 2200 ONSEMI 2000+ -, MTP52N06, MTP52N06VL Datasheet download

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Part Number: MTP50P03HDL TO-220 2200 ONSEMI 2000+ -

MFG: MOT/ON

Package Cooled: MOT

D/C: N/A

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MTP52N06VL General Description

TMOS V is a new technology designed to achieve an onresistance area product about onehalf that of standard MOSFETs. This new technology more than doubles the present cell density of our 50 and 60 volt TMOS devices. Just as with our TMOS EFET designs, TMOS V is designed to withstand high energy in the avalanche and commutation modes. Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients.

MTP52N06VL Maximum Ratings

Rating	Symbol	Value	Unit
DraintoSource Voltage	V_DSS	60	Vdc
DraintoGate Voltage (R_GS = 1.0 M)	V_DGR	60	Vdc
GatetoSource Voltage - Continuous - NonRepetitive (t_p 10 ms)	V_GS VGSM	±15 ± 20	Vdc Vpk
Drain Current - Continuous - Continuous @ 100°C - Single Pulse (t_p 10 s)	I_D I_D I_DM	52 41 182	Adc APK
Total Power Dissipation@ 25°C Derate above 25°C	P_D	188 1.25	Watts W/°C
Operating and Storage Temperature Range	T_J, T_stg	55 to 175	°C
Single Pulse DraintoSource Avalanche Energy T_J = 25°C (V_DD =25 Vdc, V_GS = 5Vdc, PEAK I_L =52Apk, L = 0.3mH, R_G = 25)	E_AS	406	mJ
Thermal Resistance - Junction to Case - Junction to Ambient	R_JC R_JA	0.8 62.5	°C/W
Maximum Lead Temperature for Soldering Purposes, 1/8"from Case for 10 seconds	T_L	260	°C

Designer's Data for "Worst Case" Conditions - The Designer's Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves - representing boundaries on device characteristics - are given to facilitate "worst case" design.

EFET, Designer's, and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.

MTP52N06VL Features

• Avalanche Energy Specified
• I_DSS and V_DS(on) Specified at Elevated Temperature
• Static Parameters are the Same for both TMOS V and TMOS EFET

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