IP100A, IP101, IP101A Selling Leads, Datasheet
MFG:IP Package Cooled:QFP D/C:05+
IP100A, IP101, IP101A
- Table of contents:
Info of IP100A
Info of IP101
Info of IP101A
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About IP1001
PDF/DataSheet Download
Datasheet: IP1001
File Size: 519701 KB
Manufacturer: IRF [International Rectifier]
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About IP101
PDF/DataSheet Download
Datasheet: IP101
File Size: 841662 KB
Manufacturer:
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About IP1001
PDF/DataSheet Download
Datasheet: IP1001
File Size: 519701 KB
Manufacturer: IRF [International Rectifier]
Download : Click here to Download
IP101 General Description
IP101 is an IEEE 802.3/802.3u compliant single-port Fast Ethernet Transceiver for both 100Mbps and 10Mbps operations. It supports Auto MDI/MDIX function to simplify the network installation and reduce the system maintenance cost. To improve the system performance, IP101 provides a hardware interrupt pin to indicate the link, speed and duplex status change. IP101 also provides Media Independent Interface (MII) / Serial Network Interface (SNI) or Reduced Media Independent Interface (RMII) to connect with different types of 10/100Mb Media Access Controller (MAC). IP101 is designed to use category 5 unshielded twisted-pair cable or Fiber-Optic cables connecting to other LAN devices. A PECL interface is supported to connect with an external 100Base-FX fiber optical transceiver.
IP101 Transceiver is fabricated with advanced CMOS technology, which the chip only requires 3.3V as power supply and consumes very low power in the Auto Power Saving mode. IP101 can be implemented as Network Interface Adapter with RJ-45 for twisted-pair connection or MAU for Fiber Connection. It can also be easily implemented into HUB, Switch, Router, Access Point, Advanced Communication Riser (ACR) and Communication and Networking Riser (CNR).
IP101 Maximum Ratings
| Symbol | Conditions | Minimum | Typical | Maximum |
| Supply Voltage | 3.0 V | 3.3V | 3.6V | |
| Storage Temp | -55°C | 125°C |
IP101 Features
10/100Mbps TX/FX
Full-duplex or half-duplex
Supports Auto MDI/MDIX function
Fully compliant with IEEE 802.3/802.3u
Supports IEEE 802.3u auto-negotiation
Supports MII / RMII / SNI interface
IEEE 802.3 full duplex control specification
Supports Automatic Power Saving mode
Supports BaseLine Wander (BLW) compensation
Supports Interrupt function
Supports repeater mode
Single 3.3V power supply with built-in 2.5V regulator
DSP-based PHY Transceiver technology
Using either 25MHz crystal or 50MHz REF_CLK as clock source
Flexible LED display for speed, duplex, link, activity and collision
Supports flow control to communicate with other MAC through MDC and MDIO
0.25u, CMOS technology
48-pin LQFP
Full-duplex or half-duplex
Supports Auto MDI/MDIX function
Fully compliant with IEEE 802.3/802.3u
Supports IEEE 802.3u auto-negotiation
Supports MII / RMII / SNI interface
IEEE 802.3 full duplex control specification
Supports Automatic Power Saving mode
Supports BaseLine Wander (BLW) compensation
Supports Interrupt function
Supports repeater mode
Single 3.3V power supply with built-in 2.5V regulator
DSP-based PHY Transceiver technology
Using either 25MHz crystal or 50MHz REF_CLK as clock source
Flexible LED display for speed, duplex, link, activity and collision
Supports flow control to communicate with other MAC through MDC and MDIO
0.25u, CMOS technology
48-pin LQFP
IP101 Connection Diagram
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