Want to post a buying lead? If you are not a member yet, please select the specific/related part number first and then fill the quantity and your contact details in the "Request for Quotation Form" on the left, and then click "Send RFQ".Your buying lead can then be posted, and the reliable suppliers will quote via our online message system or other channels soon.
The LVC16841A low voltage 20-bit transparent latch is built using advanced dual metal CMOS technology. This high speed, low power latch is ideal for temporary storage of data. The LVC16841A can be used for implementing memory address latchs, I/O ports, and bus drivers. The output enable (OE) and latch enable (LE) controls are organized to operate each device as two 10-bit latches or one 20-bit latch. Flow through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.
The LVC16841A is ideally suited for driving high capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as a backplane drivers.
All pins can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVC16841A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.
IDT74LVC16841A Maximum Ratings
Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
0.5 to +6.5
V
TSTG
Storage Temperature
65 to +150
°C
IOUT
DC Output Current
50 to +50
mA
IIK IOK
Continuous Clamp Current, VI < 0 or VO < 0
50
mA
ICC ISS
Continuous Current through each VCC or GND
±100
mA
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
IDT74LVC16841A Features
• Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4 W typ. static) • All inputs, outputs, and I/O are 5V tolerant • Supports hot insertion • Available in SSOP, TSSOP, and TVSOP packages • High Output Drivers: ±24mA • Reduced system switching noise
IDT74LVC16841A Typical Application
• 5V and 3.3V mixed voltage systems • Data communication and telecommunication systems