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IDT72V3646, IDT72V3650, IDT72V3650L15PFI

Table of contents:
Info of IDT72V3646
Info of IDT72V3650
Info of IDT72V3650L15PFI

IDT72V3646, IDT72V3650, IDT72V3650L15PFI Selling Leads, Datasheet

MFG:IDT, Integrated Device Technology Inc Category:Integrated Circuits (ICs) Package Cooled:N/A D/C:09+

IDT72V3646, IDT72V3650, IDT72V3650L15PFI Picture

IDT72V3646, IDT72V3650, IDT72V3650L15PFI Datasheet download

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Part Number: IDT72V3646

Category: Integrated Circuits (ICs)

MFG: IDT, Integrated Device Technology Inc

Package Cooled: N/A

D/C: 09+

Description: IC FIFO SS 2048X36 15NS 128-TQFP

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IDT72V3646 General Description

The IDT72V3626/72V3636/72V3646 are pin and functionally compatible versions of the IDT723626/723636/723646, designed to run off a 3.3V supply for exceptionally low-power consumption. These devices are a monolithic,high-speed, low-power, CMOS Triple Bus synchronous (clocked) FIFO memory which supports clock frequencies up to 100 MHz and has read access times as fast as 6.5ns. Two independent 256/512/1,024 x 36 dual port SRAMFIFOs on board each chip buffer data between a bidirectional 36-bit bus (PortA) and two unidirectional 18-bit buses (Port B transmits data, Port C receives data.) FIFO data can be read out of Port B and written into Port C using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations.

These devices are a synchronous (clocked) FIFO, meaning each port employs a synchronous interface. All data transfers through a port are gated to the LOW-to-HIGH transition of a port clock by enable signals. The clocks for

IDT72V3646 Maximum Ratings

Symbol	Rating	Commercial	Unit
V_CC	Supply Voltage Range	0.5 to +4.6	V
V_I⁽²⁾	Input Voltage Range	0.5 to V_CC+0.5	V
V_O⁽²⁾	Output Voltage Range	0.5 to V_CC+0.5	V
I_IK	Input Clamp Current (V_I< 0 or V_I> V_CC)	±20	mA
I_OK	Output Clamp Current(V_O= < 0 or V_O>V_CC)	±50	mA
I_OUT	Continuous Output Current (V_O= 0 to V_CC)	±50	mA
I_CC	Continuous Current Through V_CC or GND	±400	mA
T_STG	Storage Temperature Range	65 to 150	°C

IDT72V3646 Features

•Memory storage capacity:
IDT72V3626256 x 36 x 2
IDT72V3636512 x 36 x 2
IDT72V36461,024 x 36 x 2
•Clock frequencies up to 100 MHz (6.5ns access time)
•Two independent FIFOs buffer data between one bidirectional
36-bit port and two unidirectional 18-bit ports (Port C receives
and Port B transmits)
•18-bit (word) and 9-bit (byte) bus sizing of 18 bits (word) on Ports B and C
•Select IDT Standard timing (using EFA, EFB, FFA, and FFC flag
functions) or First Word Fall Through Timing (using ORA, ORB,
IRA, and IRC flag functions)
•Programmable Almost-Empty and Almost-Full flags; each has
three default offsets (8, 16 and 64)
•Serial or parallel programming of partial flags
•Big- or Little-Endian format for word and byte bus sizes
•Master Reset clears data and configures FIFO, Partial Reset
clears data but retains configuration settings
•Mailbox bypass registers for each FIFO
•Free-running CLKA, CLKB and CLKC may be asynchronous or
coincident (simultaneous reading and writing of data on a single
clock edge is permitted)
•Auto power down minimizes power dissipation
•Available in a space-saving 128-pin Thin Quad Flatpack (TQFP)
•Pin and functionally compatible versions of 5V operating
IDT723626/723636/723646
•Industrial temperature range (40°C to +85°C) is available

IDT72V3646 Connection Diagram

IDT72V3650 General Description

The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690/ 2V36100/72V36110 are exceptionally deep, high speed, CMOS First-In- First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits:
• Flexible x36/x18/x9 Bus-Matching on both read and write ports
• The period required by the retransmit operation is fixed and short.
• The first word data latency period, from the time the first word is written to an empty FIFO to the time it can be read, is fixed and short.
• High density offerings up to 4 Mbit

IDT72V3650 Maximum Ratings

Symbol	Rating	^{Com'l & Ind'l}	Unit
VTERM⁽²⁾	Terminal Voltagewith respect to GND	-0.5 _to+4.5	V
T_STG	StorageTemperature	55 _to+125
I_OUT	DC Output Current	50 _to+50	mA

IDT72V3650 Features

· Choose among the following memory organizations:Commercial
IDT72V3640 ¾ 1,024 x 36
IDT72V3650 ¾ 2,048 x 36
IDT72V3660 ¾ 4,096 x 36
IDT72V3670 ¾ 8,192 x 36
IDT72V3680 ¾ 16,384 x 36
IDT72V3690 ¾ 32,768 x 36
IDT72V36100 ¾ 65,536 x 36
IDT72V36110 ¾ 131,072 x 36
· 133 MHz operation (7.5 ns read/write cycle time)
· User selectable input and output port bus-sizing
- x36 in to x36 out
- x36 in to x18 out
- x36 in to x9 out
- x18 in to x36 out
- x9 in to x36 out
· Big-Endian/Little-Endian user selectable byte representation
· 5V input tolerant
· Fixed, low first word latency

IDT72V3650 Connection Diagram

IDT72V3650L15PFI Parameters

Technical/Catalog Information	IDT72V3650L15PFI
Vendor	IDT, Integrated Device Technology Inc
Category	Integrated Circuits (ICs)
Memory Size	73.7kb (2048 x 36)
Function	Asynchronous, Synchronous
Package / Case	128-TQFP
Packaging	Tray
Data Rate	67MHz
Mounting Type	Surface Mount
Voltage - Supply	3.15 V ~ 3.45 V
Operating Temperature	-40°C ~ 85°C
Access Time	15ns
Drawing Number	*
Lead Free Status	Contains Lead
RoHS Status	RoHS Non-Compliant
Other Names	IDT72V3650L15PFI IDT72V3650L15PFI

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