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IDT72V3611L20PF, IDT72V3611L20PQF, IDT72V3612

IDT72V3611L20PF, IDT72V3611L20PQF, IDT72V3612 Selling Leads, Datasheet

MFG:IDT, Integrated Device Technology Inc  Category:Integrated Circuits (ICs)  Package Cooled:QFP  D/C:08+

IDT72V3611L20PF, IDT72V3611L20PQF, IDT72V3612 Picture

IDT72V3611L20PF, IDT72V3611L20PQF, IDT72V3612 Datasheet download

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Part Number: IDT72V3611L20PF

Category: Integrated Circuits (ICs)

MFG: IDT, Integrated Device Technology Inc

Package Cooled: QFP

D/C: 08+

Description: IC FIFO SYNC 64X36 20NS 132-PQFP

 

 
 
 
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  • IDT10A474S5Y

  • Vendor: OKI Qty: 1100  Adddate: 2024-11-24
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  • PB GROUP CO.,LTD   China
    Contact: Ms.lindatang   MSN:linda.pb-ic@hotmail.com
    Tel: 86-0755-83753631
    Fax: 86-0755-61281270
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  • Vendor: IDT D/C: 01+& Qty: 985  Adddate: 2024-11-24
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    Tel: 86-0755-33060075/0755-29183325/0755-83221176
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About IDT 79R3081

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Datasheet: IDT 79R3081

File Size: 914564 KB

Manufacturer: IDT

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  • IDT10A474S5Y

  • Vendor: OKI Qty: 1100  Adddate: 2024-11-24
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  • PB GROUP CO.,LTD   China
    Contact: Ms.lindatang   MSN:linda.pb-ic@hotmail.com
    Tel: 86-0755-83753631
    Fax: 86-0755-61281270
    (4)
  • IDT2305-1

  • Vendor: IDT D/C: 01+& Qty: 985  Adddate: 2024-11-24
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  • ASK SEMICONDUCTOR LTD   China
    Contact: Mr.Subaninfo@asksemi.com   MSN:asksemiconductor@hotmail.com
    Tel: 86-0755-33060075/0755-29183325/0755-83221176
    Fax: 86-0755-33060076
    (5)

About IDT 79R3081

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Datasheet: IDT 79R3081

File Size: 914564 KB

Manufacturer: IDT

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  • IDT72V3612L15PF

  • Vendor: IDT Pack: QFP D/C: 05+& Qty: 1600 Note: new and orignal  Adddate: 2024-11-24
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  • XYC ELECTRONIC COMPANY   China
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  • IDT10A474S5Y

  • Vendor: OKI Qty: 1100  Adddate: 2024-11-24
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  • PB GROUP CO.,LTD   China
    Contact: Ms.lindatang   MSN:linda.pb-ic@hotmail.com
    Tel: 86-0755-83753631
    Fax: 86-0755-61281270
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About IDT72V3612

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Datasheet: IDT72V3612

File Size: 246134 KB

Manufacturer: IDT

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IDT72V3611L20PF Parameters

Technical/Catalog InformationIDT72V3611L20PF
VendorIDT, Integrated Device Technology Inc
CategoryIntegrated Circuits (ICs)
Memory Size2.3kb (64 x 36)
FunctionSynchronous
Package / Case120-TQFP
PackagingTray
Data Rate50MHz
Mounting TypeSurface Mount
Voltage - Supply3 V ~ 3.6 V
Operating Temperature0°C ~ 70°C
Access Time20ns
Drawing Number*
Lead Free StatusContains Lead
RoHS StatusRoHS Non-Compliant
Other Names IDT72V3611L20PF
IDT72V3611L20PF

IDT72V3611L20PQF Parameters

Technical/Catalog InformationIDT72V3611L20PQF
VendorIDT, Integrated Device Technology Inc
CategoryIntegrated Circuits (ICs)
Memory Size2.3kb (64 x 36)
FunctionSynchronous
Package / Case132-PQFP
PackagingTray
Data Rate50MHz
Mounting TypeSurface Mount
Voltage - Supply3 V ~ 3.6 V
Operating Temperature0°C ~ 70°C
Access Time20ns
Drawing Number*
Lead Free StatusContains Lead
RoHS StatusRoHS Non-Compliant
Other Names IDT72V3611L20PQF
IDT72V3611L20PQF

IDT72V3612 General Description

The IDT72V3612 is a pin and functionally compatible version of the IDT723612, designed to run off a 3.3V supply for exceptionally low-power consumption. This device is a monolithic high-speed, low-power CMOS bidirectional clocked FIFO memory. It supports clock frequencies up to 83 MHzand has read access times as fast as 8ns. The FIFO operates in IDT Standard mode. Two independent 64 x 36 dual-port SRAM FIFOs on board the chip buffer data in opposite directions. Each FIFO has flags to indicate empty and  full conditions and two programmable flags (Almost-Full and Almost-Empty) to indicate when a selected number of words is stored in memory. Communication between each port can bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. Parity is  hecked passively on each port and may be ignored if not desired. Parity generation can be selected for data read from each port. Two or more devices can be used in parallel to create wider data paths.

This device is a clocked FIFO, which means each port employs a synchronous interface. All data transfers through a port are gated to the LOW-to-HIGH transition of a port clock by enable signals. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.

The Full Flag (FFA, FFB) and Almost-Full (AFA, AFB) flag of a FIFO are two-stage synchronized to the port clock that writes data to its array. The Empty Flag (EFA, EFB) and Almost-Empty (AEA, AEB) flag of a FIFO are two stage synchronized to the port clock that reads data from its array.

The IDT72V3612 is characterized for operation from 0°C to 70°C. Industrial temperature range (40°C to +85°C) is available by special order. This device is fabricated using IDT's high speed, submicron CMOS technology.

IDT72V3612 Maximum Ratings

Symbol Rating Commercial Unit
VCC Supply Voltage Range 0.5 to +4.6 V
VI(2) Input Voltage Range 0.5 to VCC+0.5 V
VO(2) Output Voltage Range 0.5 to VCC+0.5 V
IIK Input Clamp Current (VI < 0 or VI > VCC) ±20 mA
IOK Output Clamp Current (VO = < 0 or VO > VCC) ±50 mA
IOUT Continuous Output Current (VO = 0 to VCC) ±50 mA
ICC Continuous Current Through VCC or GND ±500 mA
TSTG Storage Temperature Range 65 to 150 °C


NOTES:
1. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "Recommended Operating Conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded provided the input and output current ratings are observed.

IDT72V3612 Features

• Two independent clocked FIFOs (64 x 36 storage capacity each)
   buffering data in opposite directions
• Supports clock frequencies up to 83 MHz
• Fast access times of 8ns
• Free-running CLKA and CLKB can be asynchronous or
   coincident (simultaneous reading and writing of data on a
   single clock edge is permitted)
• Mailbox bypass Register for each FIFO
• Programmable Almost-Full and Almost-Empty Flags
• Microprocessor interface control logic
EFA , FFA , AEA , and AFA flags synchronized by CLKA
EFB , FFB , AEB , and AFB flags synchronized by CLKB
• Passive parity checking on each port
• Parity generation can be selected for each port
• Available in 132-pin plastic quad flat package (PQF), or space
   saving 120-pin thin quad flat package (TQFP)
• Pin and functionally compatible version of the 5V operating IDT723612
• Industrial temperature range (40°C +85°C) is available

IDT72V3612 Connection Diagram

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